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atmega_regs_common.h
Go to the documentation of this file.
1/*
2 * Copyright (C) 2016 Freie Universität Berlin
3 * 2016 INRIA
4 * 2017 Thomas Perrot <thomas.perrot@tupi.fr>
5 * 2023 Hugues Larrive
6 *
7 * This file is subject to the terms and conditions of the GNU Lesser
8 * General Public License v2.1. See the file LICENSE in the top level
9 * directory for more details.
10 */
11
12#pragma once
13
27
28#include <avr/io.h>
29#include <avr/power.h>
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
39#define REG8 volatile uint8_t
40#define REG16 volatile uint16_t
42
46#ifdef TCCR1C
47typedef struct {
48 REG8 CRA;
49 REG8 CRB;
50 REG8 CRC;
51 REG8 reserved;
52 REG16 CNT;
53 REG16 ICR;
54 REG16 OCR[3];
56#else /* atmega8 */
57typedef struct {
58 REG16 ICR;
59 REG16 OCR[2];
60 REG16 CNT;
64#endif
65
69typedef struct {
70#if ((defined(TCCR0A) && defined(TCCR0B)) || (defined(TCCR2A) && defined(TCCR2B)))
71 REG8 CRA;
72 REG8 CRB;
73 REG8 CNT;
74 REG8 OCR[2];
75#elif defined(TCCR2)
76 REG8 OCR;
77 REG8 CNT;
78 REG8 CR;
79#endif
81
85typedef struct {
86#if defined(UCSR0A) || defined(UCSR1A)
87 REG8 CSRA;
88 REG8 CSRB;
89 REG8 CSRC;
90#ifdef UCSR1D /* 32u4 */
91 REG8 CSRD;
92#else
93 REG8 reserved;
94#endif
95 REG16 BRR;
96 REG8 DR;
97#elif defined(UCSRA) /* atmega8 */
98 REG8 BRRL;
99 REG8 CSRB;
100 REG8 CSRA;
101 REG8 DR;
102 REG8 padding[19];
104 REG8 CSRC;
106#endif
108
113#if defined(TCCR0A)
114#define MINI_TIMER0 ((mini_timer_t *)(uint16_t *)(&TCCR0A))
115#define MINI_TIMER0_DIV TIMER_DIV1_8_64_128_1024
116#endif
117
118#if defined(TCCR1C)
119#define MEGA_TIMER1_BASE (uint16_t *)(&TCCR1A)
120#define MEGA_TIMER1 ((mega_timer_t *)MEGA_TIMER1_BASE)
121#elif defined(TCCR1A) /* atmega8 */
122#define MEGA_TIMER1_BASE (uint16_t *)(&ICR1L)
123#define MEGA_TIMER1 ((mega_timer_t *)MEGA_TIMER1_BASE)
124#endif
125
126#if defined(TCCR2A)
127#define MINI_TIMER2 ((mini_timer_t *)(uint16_t *)(&TCCR2A))
128#define MINI_TIMER2_DIV TIMER_DIV1_8_32_64_128_256_1024
129#elif defined(TCCR2) /* atmega8 */
130#define MINI_TIMER2 ((mini_timer_t *)(uint16_t *)(&OCR2))
131#define MINI_TIMER2_DIV TIMER_DIV1_8_32_64_128_256_1024
132#endif
133
134#if defined(TCCR3A)
135#define MEGA_TIMER3_BASE (uint16_t *)(&TCCR3A)
136#define MEGA_TIMER3 ((mega_timer_t *)MEGA_TIMER3_BASE)
137#endif
138
139#if defined(TCCR4A)
140#define MEGA_TIMER4_BASE (uint16_t *)(&TCCR4A)
141#define MEGA_TIMER4 ((mega_timer_t *)MEGA_TIMER4_BASE)
142#endif
143
144#if defined(TCCR5A)
145#define MEGA_TIMER5_BASE (uint16_t *)(&TCCR5A)
146#define MEGA_TIMER5 ((mega_timer_t *)MEGA_TIMER5_BASE)
147#endif
149
154#if defined(UCSRA)
155#define MEGA_UART_BASE ((uint16_t *)(&UBRRL))
156#define MEGA_UART ((mega_uart_t *)MEGA_UART_BASE)
157#endif
158
159#if defined(UCSR0A)
160#define MEGA_UART0_BASE ((uint16_t *)(&UCSR0A))
161#define MEGA_UART0 ((mega_uart_t *)MEGA_UART0_BASE)
162#endif
163
164#if defined(UCSR1A)
165#define MEGA_UART1_BASE ((uint16_t *)(&UCSR1A))
166#define MEGA_UART1 ((mega_uart_t *)MEGA_UART1_BASE)
167#endif
168
169#if defined(UCSR2A)
170#define MEGA_UART2_BASE ((uint16_t *)(&UCSR2A))
171#define MEGA_UART2 ((mega_uart_t *)MEGA_UART2_BASE)
172#endif
173
174#if defined(UCSR3A)
175#define MEGA_UART3_BASE ((uint16_t *)(&UCSR3A))
176#define MEGA_UART3 ((mega_uart_t *)MEGA_UART3_BASE)
177#endif
179
180#ifdef __cplusplus
181}
182#endif
183
#define REG8
Register types.
#define REG16(ADDR)
Type for 16-bit registers.
Definition periph_gba.h:36
Timer register map.
REG16 CNT
counter
REG8 CRA
control A
REG8 CRB
control B
REG16 ICR
input capture
REG16 OCR[2]
output compare
UART register map.
8-bit timer register map