CPU specific definitions for internal peripheral handling. More...
CPU specific definitions for internal peripheral handling.
Definition in file periph_cpu.h.
#include <avr/io.h>
Go to the source code of this file.
Data Structures | |
struct | uart_conf_t |
UART device configuration. More... | |
struct | timer_conf_t |
Timer device configuration. More... | |
struct | i2c_conf_t |
I2C configuration structure. More... | |
struct | spi_conf_t |
SPI device configuration. More... | |
Macros | |
#define | PWR_RED_REG(reg, dev) |
Define a CPU specific Power Reduction index macro. | |
#define | GPIO_UNDEF (0xffff) |
Definition of a fitting UNDEF value. | |
#define | UART_MAX_NUMOF (7) |
Max number of available UARTs. | |
#define | UART_TXBUF_SIZE (64) |
Size of the UART TX buffer for non-blocking mode. | |
#define | TIMER_CH_MAX_NUMOF (4) |
Max number of available timer channels. | |
#define | PERIPH_TIMER_PROVIDES_SET |
A low-level timer_set() implementation is provided. | |
Typedefs | |
typedef uint16_t | pwr_reduction_t |
Power Reduction Peripheral Mask. | |
Enumerations | |
enum | { PORT_A , PORT_B , PORT_C , PORT_D , PORT_E , PORT_F , PORT_G , PORT_H , PORT_J , PORT_K , PORT_L , PORT_M , PORT_N , PORT_P , PORT_Q , PORT_R , PORT_MAX } |
Available ports on the ATxmega family. More... | |
enum | { PWR_GENERAL_POWER , PWR_PORT_A , PWR_PORT_B , PWR_PORT_C , PWR_PORT_D , PWR_PORT_E , PWR_PORT_F } |
Define a CPU specific Power Reduction index macro. More... | |
enum | timer_type_t { TC_TYPE_0 = 0 , TC_TYPE_1 = 1 , TC_TYPE_2 = 2 , TC_TYPE_4 = 4 , TC_TYPE_5 = 5 } |
Timer Type. More... | |
Length of the CPU_ID in octets | |
#define | CPUID_LEN (11U) |
Power management configuration | |
#define | PM_NUM_MODES (5) |
#define | AVR8_PM_SLEEP_MODE_0 SLEEP_MODE_PWR_DOWN |
Power Down. | |
#define | AVR8_PM_SLEEP_MODE_1 SLEEP_MODE_PWR_SAVE |
Power Save. | |
#define | AVR8_PM_SLEEP_MODE_2 SLEEP_MODE_STANDBY |
Standby. | |
#define | AVR8_PM_SLEEP_MODE_3 SLEEP_MODE_EXT_STANDBY |
Extended Standby. | |
#define | GPIO_EXT_INT_NUMOF (2 * PORT_MAX) |
Define the number of GPIO interrupts vectors for ATxmega CPU. | |
#define | HAVE_GPIO_T |
Override GPIO type. | |
typedef uint16_t | gpio_t |
#define | ATXMEGA_GPIO_PIN(x, y) |
Define a CPU specific GPIO pin generator macro. | |
#define | GPIO_PIN(x, y) |
#define | HAVE_GPIO_MODE_T |
Available pin modes. | |
enum | GPIO_MODE { GPIO_SLEW_RATE = (1 << 7) , GPIO_INVERTED = (1 << 6) , GPIO_OPC_TOTEN = (0 << 3) , GPIO_OPC_BSKPR = (1 << 3) , GPIO_OPC_PD = (2 << 3) , GPIO_OPC_PU = (3 << 3) , GPIO_OPC_WRD_OR = (4 << 3) , GPIO_OPC_WRD_AND = (5 << 3) , GPIO_OPC_WRD_OR_PULL = (6 << 3) , GPIO_OPC_WRD_AND_PULL = (7 << 3) , GPIO_ANALOG = (1 << 1) , GPIO_IN = (0 << 0) , GPIO_OUT = (1 << 0) , GPIO_IN_PU = GPIO_IN | GPIO_OPC_PU , GPIO_IN_PD = GPIO_IN | GPIO_OPC_PD , GPIO_OD = GPIO_OUT | GPIO_OPC_WRD_OR , GPIO_OD_PU = GPIO_OUT | GPIO_OPC_WRD_OR_PULL } |
typedef enum GPIO_MODE | gpio_mode_t |
#define | HAVE_GPIO_FLANK_T |
Definition of possible active flanks for external interrupt mode. | |
enum | gpio_flank_t { GPIO_ISC_BOTH = (0 << 4) , GPIO_ISC_RISING = (1 << 4) , GPIO_ISC_FALLING = (2 << 4) , GPIO_ISC_LOW_LEVEL = (3 << 4) , GPIO_INT_DISABLED_ALL = (1 << 3) , GPIO_INT0_VCT = (0 << 2) , GPIO_INT1_VCT = (1 << 2) , GPIO_LVL_OFF = (0 << 0) , GPIO_LVL_LOW = (1 << 0) , GPIO_LVL_MID = (2 << 0) , GPIO_LVL_HIGH = (3 << 0) , GPIO_FALLING = GPIO_ISC_FALLING | GPIO_LVL_LOW , GPIO_RISING = GPIO_ISC_RISING | GPIO_LVL_LOW , GPIO_BOTH = GPIO_ISC_BOTH | GPIO_LVL_LOW } |
Override I2C clock speed values | |
#define | HAVE_I2C_SPEED_T |
enum | i2c_speed_t { I2C_SPEED_LOW = 10000ul , I2C_SPEED_NORMAL = 100000ul , I2C_SPEED_FAST = 400000ul , I2C_SPEED_FAST_PLUS = 1000000ul , I2C_SPEED_HIGH = 3400000ul } |
#define | PERIPH_SPI_NEEDS_INIT_CS |
Enable common SPI functions. | |
#define | PERIPH_SPI_NEEDS_TRANSFER_BYTE |
#define | PERIPH_SPI_NEEDS_TRANSFER_REG |
#define | PERIPH_SPI_NEEDS_TRANSFER_REGS |
#define | SPI_UNDEF (UCHAR_MAX) |
Define global value for undefined SPI device. | |
#define | HAVE_SPI_T |
Define spi_t data type to save data. | |
typedef uint8_t | spi_t |
#define | HAVE_SPI_CLK_T |
Available SPI clock speeds. | |
enum | spi_clk_t { SPI_CLK_100KHZ = 100000U , SPI_CLK_400KHZ = 400000U , SPI_CLK_1MHZ = 1000000U , SPI_CLK_5MHZ = 5000000U , SPI_CLK_10MHZ = 10000000U } |
Interrupt level used to control nested interrupts | |
enum | cpu_int_lvl_t { CPU_INT_LVL_OFF , CPU_INT_LVL_LOW , CPU_INT_LVL_MID , CPU_INT_LVL_HIGH } |
#define ATXMEGA_GPIO_PIN | ( | x, | |
y ) |
Define a CPU specific GPIO pin generator macro.
The ATxmega internally uses pin mask to manipulate all gpio functions. This allows simultaneous pin actions at any method call. ATxmega specific applications can use ATXMEGA_GPIO_PIN macro to define pins and generic RIOT-OS application should continue to use GPIO_PIN API for compatibility.
Definition at line 131 of file periph_cpu.h.
#define AVR8_PM_SLEEP_MODE_0 SLEEP_MODE_PWR_DOWN |
Power Down.
Definition at line 95 of file periph_cpu.h.
#define AVR8_PM_SLEEP_MODE_1 SLEEP_MODE_PWR_SAVE |
Power Save.
Definition at line 96 of file periph_cpu.h.
#define AVR8_PM_SLEEP_MODE_2 SLEEP_MODE_STANDBY |
Standby.
Definition at line 97 of file periph_cpu.h.
#define AVR8_PM_SLEEP_MODE_3 SLEEP_MODE_EXT_STANDBY |
Extended Standby.
Definition at line 98 of file periph_cpu.h.
#define CPUID_LEN (11U) |
Definition at line 28 of file periph_cpu.h.
#define GPIO_EXT_INT_NUMOF (2 * PORT_MAX) |
Define the number of GPIO interrupts vectors for ATxmega CPU.
Definition at line 105 of file periph_cpu.h.
#define GPIO_PIN | ( | x, | |
y ) |
Definition at line 132 of file periph_cpu.h.
#define GPIO_UNDEF (0xffff) |
Definition of a fitting UNDEF value.
Definition at line 119 of file periph_cpu.h.
#define HAVE_GPIO_FLANK_T |
Definition of possible active flanks for external interrupt mode.
Definition at line 175 of file periph_cpu.h.
#define HAVE_GPIO_MODE_T |
Available pin modes.
Generally, a pin can be configured to be input or output. In output mode, a pin can further be put into push-pull or open drain configuration. Though this is supported by most platforms, this is not always the case, so driver implementations may return an error code if a mode is not supported.
Definition at line 144 of file periph_cpu.h.
#define HAVE_GPIO_T |
Override GPIO type.
Definition at line 112 of file periph_cpu.h.
#define HAVE_I2C_SPEED_T |
Definition at line 271 of file periph_cpu.h.
#define HAVE_SPI_CLK_T |
Available SPI clock speeds.
Definition at line 347 of file periph_cpu.h.
#define HAVE_SPI_T |
Define spi_t data type to save data.
Definition at line 325 of file periph_cpu.h.
#define PERIPH_I2C_NEED_READ_REG |
Definition at line 286 of file periph_cpu.h.
#define PERIPH_I2C_NEED_READ_REGS |
Definition at line 287 of file periph_cpu.h.
#define PERIPH_I2C_NEED_WRITE_REG |
Definition at line 288 of file periph_cpu.h.
#define PERIPH_I2C_NEED_WRITE_REGS |
Definition at line 289 of file periph_cpu.h.
#define PERIPH_SPI_NEEDS_INIT_CS |
Enable common SPI functions.
Definition at line 308 of file periph_cpu.h.
#define PERIPH_SPI_NEEDS_TRANSFER_BYTE |
Definition at line 309 of file periph_cpu.h.
#define PERIPH_SPI_NEEDS_TRANSFER_REG |
Definition at line 310 of file periph_cpu.h.
#define PERIPH_SPI_NEEDS_TRANSFER_REGS |
Definition at line 311 of file periph_cpu.h.
#define PERIPH_TIMER_PROVIDES_SET |
A low-level timer_set() implementation is provided.
Definition at line 236 of file periph_cpu.h.
#define PM_NUM_MODES (5) |
Definition at line 94 of file periph_cpu.h.
#define PWR_RED_REG | ( | reg, | |
dev ) |
Define a CPU specific Power Reduction index macro.
Definition at line 75 of file periph_cpu.h.
#define SPI_UNDEF (UCHAR_MAX) |
Define global value for undefined SPI device.
Definition at line 318 of file periph_cpu.h.
#define TIMER_CH_MAX_NUMOF (4) |
Max number of available timer channels.
Definition at line 231 of file periph_cpu.h.
#define UART_MAX_NUMOF (7) |
Max number of available UARTs.
Definition at line 202 of file periph_cpu.h.
#define UART_TXBUF_SIZE (64) |
Size of the UART TX buffer for non-blocking mode.
Definition at line 208 of file periph_cpu.h.
typedef uint16_t gpio_t |
Definition at line 113 of file periph_cpu.h.
typedef uint16_t pwr_reduction_t |
Power Reduction Peripheral Mask.
Definition at line 70 of file periph_cpu.h.
typedef uint8_t spi_t |
Definition at line 326 of file periph_cpu.h.
anonymous enum |
Define a CPU specific Power Reduction index macro.
Definition at line 80 of file periph_cpu.h.
anonymous enum |
Available ports on the ATxmega family.
Definition at line 46 of file periph_cpu.h.
enum cpu_int_lvl_t |
Enumerator | |
---|---|
CPU_INT_LVL_OFF | Interrupt Disabled. |
CPU_INT_LVL_LOW | Interrupt Low Level. |
CPU_INT_LVL_MID | Interrupt Medium Level. |
CPU_INT_LVL_HIGH | Interrupt High Level. |
Definition at line 35 of file periph_cpu.h.
enum gpio_flank_t |
Definition at line 176 of file periph_cpu.h.
enum GPIO_MODE |
Definition at line 145 of file periph_cpu.h.
enum i2c_speed_t |
Definition at line 272 of file periph_cpu.h.
enum spi_clk_t |
Definition at line 348 of file periph_cpu.h.
enum timer_type_t |
Timer Type.
Timer Type 1 is equal to Type 0 (two channels instead four) Timer Type 2 is Type 0 configured as two 8 bit timers instead one 16 bit Timer Type 2 won't be available as a standard timer Timer Type 5 is equal to Type 4 (two channels instead four)
Definition at line 246 of file periph_cpu.h.