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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2014 Freie Universität Berlin
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
19
20/* This board provides an HSE */
21#ifndef CONFIG_BOARD_HAS_HSE
22#define CONFIG_BOARD_HAS_HSE 1
23#endif
24
25/* The HSE provides a 16MHz clock */
26#ifndef CONFIG_CLOCK_HSE
27#define CONFIG_CLOCK_HSE MHZ(16)
28#endif
29
30#include "periph_cpu.h"
31#include "clk_conf.h"
32
33#ifdef __cplusplus
34extern "C" {
35#endif
36
41static const timer_conf_t timer_config[] = {
42 {
43 .dev = TIM2,
44 .max = 0xffffffff,
45 .rcc_mask = RCC_APB1ENR_TIM2EN,
46 .bus = APB1,
47 .irqn = TIM2_IRQn
48 },
49 {
50 .dev = TIM5,
51 .max = 0xffffffff,
52 .rcc_mask = RCC_APB1ENR_TIM5EN,
53 .bus = APB1,
54 .irqn = TIM5_IRQn
55 }
56};
57
58#define TIMER_0_ISR isr_tim2
59#define TIMER_1_ISR isr_tim5
60
61#define TIMER_NUMOF ARRAY_SIZE(timer_config)
63
68static const uart_conf_t uart_config[] = {
69 {
70 .dev = USART6,
71 .rcc_mask = RCC_APB2ENR_USART6EN,
72 .rx_pin = GPIO_PIN(PORT_C, 7),
73 .tx_pin = GPIO_PIN(PORT_C, 6),
74 .rx_af = GPIO_AF8,
75 .tx_af = GPIO_AF8,
76 .bus = APB2,
77 .irqn = USART6_IRQn,
78#ifdef MODULE_PERIPH_DMA
79 .dma = DMA_STREAM_UNDEF,
80 .dma_chan = UINT8_MAX,
81#endif
82 }
83};
84
85#define UART_0_ISR (isr_usart6)
86
87#define UART_NUMOF ARRAY_SIZE(uart_config)
89
90#ifdef __cplusplus
91}
92#endif
93
@ PORT_C
port C
Definition periph_cpu.h:45
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
@ GPIO_AF8
use alternate function 8
Definition cpu_gpio.h:110
@ APB1
Advanced Peripheral Bus 1.
Definition periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2.
Definition periph_cpu.h:79
Timer device configuration.
Definition periph_cpu.h:260
UART device configuration.
Definition periph_cpu.h:214