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cc26xx_cc13xx_adi.h
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1/*
2 * SPDX-FileCopyrightText: 2020 Locha Inc
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
17
18#include "cc26xx_cc13xx.h"
19
20#ifdef __cplusplus
21extern "C" {
22#endif
23
46
69
74#define ADI_3_REFSYS_DCDCCTL3_VDDR_BOOST_COMP_BOOST 0x00000002
75#define ADI_3_REFSYS_AUX_DEBUG_LPM_BIAS_BACKUP_EN 0x00000040
77
85#define ADI_3_REFSYS_BASE (PERIPH_BASE + 0x86200)
89#define ADI_3_REFSYS_BASE_SET (ADI_3_REFSYS_BASE + ADI_SET)
93#define ADI_3_REFSYS_BASE_CLR (ADI_3_REFSYS_BASE + ADI_CLR)
97#define ADI_3_REFSYS_BASE_M4 (ADI_3_REFSYS_BASE + ADI_MASK4B)
99
103#define ADI3 ((adi_3_refsys_regs_t *) (ADI_3_REFSYS_BASE))
107#define ADI3_SET ((adi_3_refsys_regs_t *) (ADI_3_REFSYS_BASE_SET))
111#define ADI3_CLR ((adi_3_refsys_regs_t *) (ADI_3_REFSYS_BASE_CLR))
115#define ADI3_M4 ((adi_3_refsys_regs_m4_t *) (ADI_3_REFSYS_BASE_M4))
116
117#ifdef __cplusplus
118}
119#endif
120
CC26xx, CC13xx definitions.
volatile uint8_t reg8_t
Unsigned 8-bit register type.
ADI_3_REFSYS registers.
reg8_m4_t REFSYSCTL0
Internal.
reg8_m4_t DCDCCTL3
Internal.
reg8_m4_t DCDCCTL5
Internal.
reg8_m4_t DCDCCTL2
DCDC Control 2.
reg8_m4_t REFSYSCTL1
Internal.
reg8_m4_t REFSYSCTL3
Internal.
reg8_m4_t __reserved1
Reserved.
reg8_m4_t DCDCCTL1
DCDC Control 1.
reg8_m4_t REFSYSCTL2
Internal.
reg8_m4_t DCDCCTL4
Internal.
reg8_m4_t ATESTCTL1
Internal.
reg8_m4_t DCDCCTL0
DCDC Control 0.
ADI_3_REFSYS registers.
reg8_t DCDCCTL5
Internal.
reg8_t DCDCCTL0
DCDC Control 0.
reg8_t DCDCCTL1
DCDC Control 1.
reg8_t REFSYSCTL3
Internal.
reg8_t ATESTCTL1
Internal.
reg8_t __reserved1
Reserved.
reg8_t DCDCCTL4
Internal.
reg8_t REFSYSCTL0
Internal.
reg8_t DCDCCTL3
Internal.
reg8_t REFSYSCTL2
Internal.
reg8_t DCDCCTL2
DCDC Control 2.
reg8_t REFSYSCTL1
Internal.
Masked 8-bit register.