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cc26xx_cc13xx_rfc.h
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1/*
2 * Copyright (C) 2020 Locha Inc
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
9#pragma once
10
20
21#include "cc26xx_cc13xx.h"
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
44
49
53typedef enum {
54 HW_IRQ_FSCA = (1 << 1),
55 HW_IRQ_MDMDONE = (1 << 2),
56 HW_IRQ_MDMIN = (1 << 3),
57 HW_IRQ_MDMOUT = (1 << 4),
58 HW_IRQ_MDMSOFT = (1 << 5),
59 HW_IRQ_TRCTK = (1 << 6),
60 HW_IRQ_RFEDONE = (1 << 8),
61 HW_IRQ_RFESOFT0 = (1 << 9),
62 HW_IRQ_RFESOFT1 = (1 << 10),
63 HW_IRQ_RFESOFT2 = (1 << 11),
64 HW_IRQ_RATCH0 = (1 << 12),
65 HW_IRQ_RATCH1 = (1 << 13),
66 HW_IRQ_RATCH2 = (1 << 14),
67 HW_IRQ_RATCH3 = (1 << 15),
68 HW_IRQ_RATCH4 = (1 << 16),
69 HW_IRQ_RATCH5 = (1 << 17),
70 HW_IRQ_RATCH6 = (1 << 18),
71 HW_IRQ_RATCH7 = (1 << 19)
73
77typedef enum {
78 CPE_IRQ_COMMAND_DONE = (1 << 0),
79 CPE_IRQ_LAST_COMMAND_DONE = (1 << 1),
80 CPE_IRQ_FG_COMMAND_DONE = (1 << 2),
81 CPE_IRQ_LAST_FG_COMMAND_DONE = (1 << 3),
82 CPE_IRQ_TX_DONE = (1 << 4),
83 CPE_IRQ_TX_ACK = (1 << 5),
84 CPE_IRQ_TX_CTRL = (1 << 6),
85 CPE_IRQ_TX_CTRL_ACK = (1 << 7),
86 CPE_IRQ_TX_CTRL_ACK_ACK = (1 << 8),
87 CPE_IRQ_TX_RETRANS = (1 << 9),
88 CPE_IRQ_TX_ENTRY_DONE = (1 << 10),
89 CPE_IRQ_TX_BUFFER_CHANGED = (1 << 11),
90#ifdef CPU_VARIANT_X2
91 CPE_IRQ_COMMAND_STARTED = (1 << 12),
92 CPE_IRQ_FG_COMMAND_STARTED = (1 << 13),
93#else
94 CPE_IRQ_IRQ12 = (1 << 12),
95 CPE_IRQ_IRQ13 = (1 << 13),
96#endif
97 CPE_IRQ_IRQ14 = (1 << 14),
98 CPE_IRQ_IRQ15 = (1 << 15),
99 CPE_IRQ_RX_OK = (1 << 16),
100 CPE_IRQ_RX_NOK = (1 << 17),
101 CPE_IRQ_RX_IGNORED = (1 << 18),
102 CPE_IRQ_RX_EMPTY = (1 << 19),
103 CPE_IRQ_RX_CTRL = (1 << 20),
104 CPE_IRQ_RX_CTRL_ACK = (1 << 21),
105 CPE_IRQ_RX_BUF_FULL = (1 << 22),
106 CPE_IRQ_RX_ENTRY_DONE = (1 << 23),
107 CPE_IRQ_RX_DATA_WRITTEN = (1 << 24),
108 CPE_IRQ_RX_N_DATA_WRITTEN = (1 << 25),
109 CPE_IRQ_RX_ABORTED = (1 << 26),
110 CPE_IRQ_IRQ27 = (1 << 27),
111 CPE_IRQ_SYNTH_NO_LOCK = (1 << 28),
112 CPE_IRQ_MODULES_UNLOCKED = (1 << 29),
113 CPE_IRQ_BOOT_DONE = (1 << 30),
114 CPE_IRQ_INTERNAL_ERROR = (1 << 31),
116
117#define RFACKIFG_ACKFLAG 0x1
119
124#define RFC_DBELL_BASE (PERIPH_BASE + 0x41000)
125#define RFC_DBELL_BASE_NONBUF (PERIPH_BASE_NONBUF + 0x41000)
127
128#define RFC_DBELL ((rfc_dbell_regs_t *) (RFC_DBELL_BASE))
129#define RFC_DBELL_NONBUF ((rfc_dbell_regs_t *) (RFC_DBELL_BASE_NONBUF))
130
134typedef struct {
137
142#define PWMCLKEN_RFCTRC 0x400
143#define PWMCLKEN_FSCA 0x200
144#define PWMCLKEN_PHA 0x100
145#define PWMCLKEN_RAT 0x80
146#define PWMCLKEN_RFERAM 0x40
147#define PWMCLKEN_MDMRAM 0x10
148#define PWMCLKEN_MDM 0x8
149#define PWMCLKEN_CPERAM 0x4
150#define PWMCLKEN_CPE 0x2
151#define PWMCLKEN_RFC 0x1
153
158#define RFC_PWR_BASE (PERIPH_BASE + 0x40000)
159#define RFC_PWR_BASE_NONBUF (PERIPH_BASE_NONBUF + 0x40000)
161
162#define RFC_PWR ((rfc_pwr_regs_t *) (RFC_PWR_BASE))
163#define RFC_PWR_NONBUF ((rfc_pwr_regs_t *) (RFC_PWR_BASE_NONBUF))
164
165#ifdef __cplusplus
166}
167#endif
168
CC26xx, CC13xx definitions.
rf_cpe_irq_t
RFCPEIEN/RFCPEIFG/RFCPEISL interrupt flags.
rf_hw_irq_t
RFC_DBELL definitions.
volatile uint32_t reg32_t
Unsigned 32-bit register type.
RFC_DBELL registers.
reg32_t RFHWIFG
Interrupt Flags From RF Hardware Modules.
reg32_t RFCPEIFG
Interrupt Flags For Command and Packet Engine Generated Interrupts.
reg32_t RFCPEIEN
Interrupt Enable For Command and Packet Engine Generated Interrupts.
reg32_t SYSGPOCTL
RF Core General Purpose Output Control.
reg32_t RFACKIFG
Doorbell Command Acknowledgement Interrupt Flag.
reg32_t CMDSTA
Doorbell Command Status Register.
reg32_t CMDR
Doorbell Command Register.
reg32_t RFCPEISL
Interrupt Vector Selection For Command and Packet Engine Generated Interrupts.
reg32_t RFHWIEN
Interrupt Enable For RF Hardware Modules.
RFC_PWR registers.
reg32_t PWMCLKEN
RF Core Power Management and Clock Enable.