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cfg_timer_tim2_tim15_tim16.h
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1/*
2 * Copyright (C) 2023 Otto-von-Guericke-Universität Magdeburg
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
9#pragma once
10
21
22#include "periph_cpu.h"
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28/* Please note: This likely needs some generalization for use in STM32 families
29 * other than L4. */
34static const timer_conf_t timer_config[] = {
35 {
36 .dev = TIM2,
37 .max = 0xffffffff,
38#if defined(RCC_APB1ENR_TIM2EN)
39 .rcc_mask = RCC_APB1ENR_TIM2EN,
40#else
41 .rcc_mask = RCC_APB1ENR1_TIM2EN,
42#endif
43 .bus = APB1,
44 .irqn = TIM2_IRQn
45 },
46 {
47 .dev = TIM15,
48 .max = 0x0000ffff,
49 .rcc_mask = RCC_APB2ENR_TIM15EN,
50 .bus = APB2,
51 .irqn = TIM1_BRK_TIM15_IRQn,
52 .channel_numof = 2,
53 },
54 {
55 .dev = TIM16,
56 .max = 0x0000ffff,
57 .rcc_mask = RCC_APB2ENR_TIM16EN,
58 .bus = APB2,
59 .irqn = TIM1_UP_TIM16_IRQn,
60 .channel_numof = 1,
61 },
62};
63
64#define TIMER_0_ISR isr_tim2
65#define TIMER_1_ISR isr_tim1_brk_tim15
66#define TIMER_2_ISR isr_tim1_up_tim16
67
68#define TIMER_NUMOF ARRAY_SIZE(timer_config)
70
71#ifdef __cplusplus
72}
73#endif
74
@ APB1
Advanced Peripheral Bus 1.
Definition periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2.
Definition periph_cpu.h:79
Timer device configuration.
Definition periph_cpu.h:263