18#include "periph_cpu.h"
26#define BIT(X) (1<<(X))
56 #if defined(I2C0_SCL) && defined(I2C0_SDA) && defined(I2C0_SPEED)
63 #if defined(I2C1_SCL) && defined(I2C1_SDA) && defined(I2C1_SPEED)
80#define I2C_NUMOF ARRAY_SIZE(i2c_config)
101#if defined(PWM0_GPIOS) || defined(DOXYGEN)
144#define SPI0_DEV SPI_DEV(0)
145#define SPI0_CTRL HSPI
146#define SPI0_MISO GPIO12
147#define SPI0_MOSI GPIO13
148#define SPI0_SCK GPIO14
151#define SPI0_CS0 GPIO15
178#define SPI_NUMOF ARRAY_SIZE(spi_config)
186#if defined(MODULE_ESP_SW_TIMER)
189#define TIMER_NUMOF (1U)
190#define TIMER_CHANNEL_NUMOF (10U)
195#define TIMER_NUMOF (1U)
196#define TIMER_CHANNEL_NUMOF (1U)
225#define UART0_TXD GPIO1
229#define UART0_RXD GPIO3
233#define UART1_TXD GPIO2
237#define UART1_RXD GPIO_UNDEF
264#define UART_NUMOF ARRAY_SIZE(uart_config)
#define I2C0_SPEED
I2C bus speed of I2C_DEV(0)
#define SPI0_MOSI
Routed vio the GPIO matrix to FSPI MOSI signal.
#define UART0_RXD
direct I/O pin for UART_DEV(0) RxD, can't be changed
#define SPI0_CTRL
FSPI is used as SPI_DEV(0)
#define SPI0_CS0
Routed vio the GPIO matrix to FSPI CS0 signal.
#define I2C0_SCL
SCL signal of I2C_DEV(0)
#define PWM0_GPIOS
Declaration of the channels for device PWM_DEV(0), at maximum eight channels (PWM_CH_NUMOF_MAX).
#define SPI0_SCK
Routed vio the GPIO matrix to FSPI CLK signal.
#define SPI0_MISO
Routed vio the GPIO matrix to FSPI MISO signal.
#define UART0_TXD
direct I/O pin for UART_DEV(0) TxD, can't be changed
#define I2C0_SDA
SDA signal of I2C_DEV(0)
static const gpio_t pwm0_channels[]
Static array of GPIOs that can be used as channels of PWM_DEV(0)
#define UART1_TXD
TxD pin of UART_DEV(1)
#define UART1_RXD
RxD pin of UART_DEV(1)
Common macros and compiler attributes/pragmas configuration.
I2C configuration structure.
SPI device configuration.
UART device configuration.