Macros | |
#define | CONFIG_AT86RF215_USE_CLOCK_OUTPUT |
Set to 1 if the clock output of the AT86RF215 is used as a clock source on the board. | |
#define | CONFIG_AT86RF215_TRIM_VAL (0) |
Trim value for the external crystal oscillator. | |
#define | CONFIG_AT86RF215_DEFAULT_TXPOWER (CONFIG_IEEE802154_DEFAULT_TXPOWER) |
Default TX power (0dBm) | |
Channel configuration | |
#define | CONFIG_AT86RF215_DEFAULT_CHANNEL (CONFIG_IEEE802154_DEFAULT_CHANNEL) |
#define | CONFIG_AT86RF215_DEFAULT_SUBGHZ_CHANNEL (CONFIG_IEEE802154_DEFAULT_SUBGHZ_CHANNEL) |
Enable Reduced Power Consumption | |
#define | CONFIG_AT86RF215_RPC_EN (0) |
Default Battery Monitor trigger threshold (in mV) | |
if battery monitoring is enabled | |
#define | CONFIG_AT86RF215_BATMON_THRESHOLD (1800) |
Default PHY Mode | |
#define | CONFIG_AT86RF215_DEFAULT_PHY_MODE (IEEE802154_PHY_OQPSK) |
Default O-QPSK Rate Mode | |
Non-zero value enables proprietary high data rate by default | |
#define | CONFIG_AT86RF215_DEFAULT_OQPSK_RATE (0) |
Default MR-O-QPSK Chip Rate | |
#define | CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_1000) |
Default MR-O-QPSK Rate Mode | |
#define | CONFIG_AT86RF215_DEFAULT_MR_OQPSK_RATE (2) |
Default MR-OFDM Option | |
#define | CONFIG_AT86RF215_DEFAULT_MR_OFDM_OPT (2) |
Default MR-OFDM Modulation & Coding Scheme | |
#define | CONFIG_AT86RF215_DEFAULT_MR_OFDM_MCS (2) |
Default MR-FSK Symbol Rate | |
#define | CONFIG_AT86RF215_DEFAULT_MR_FSK_SRATE FSK_SRATE_200K |
Default MR-FSK Modulation Index, fraction of 64 | |
#define | CONFIG_AT86RF215_DEFAULT_MR_FSK_MOD_IDX (64) |
Default MR-FSK Modulation Order | |
#define | CONFIG_AT86RF215_DEFAULT_MR_FSK_MORD FSK_MORD_4SFK |
Default MR-FSK Forward Error Correction Scheme | |
#define | CONFIG_AT86RF215_DEFAULT_MR_FSK_FEC IEEE802154_FEC_NONE |
#define CONFIG_AT86RF215_BATMON_THRESHOLD (1800) |
Definition at line 131 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_CHANNEL (CONFIG_IEEE802154_DEFAULT_CHANNEL) |
Definition at line 108 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_MR_FSK_FEC IEEE802154_FEC_NONE |
Definition at line 240 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_MR_FSK_MOD_IDX (64) |
Definition at line 222 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_MR_FSK_MORD FSK_MORD_4SFK |
Definition at line 231 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_MR_FSK_SRATE FSK_SRATE_200K |
Definition at line 213 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_MR_OFDM_MCS (2) |
Definition at line 204 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_MR_OFDM_OPT (2) |
Definition at line 195 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_1000) |
Definition at line 177 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_RATE (2) |
Definition at line 186 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_OQPSK_RATE (0) |
Definition at line 158 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_PHY_MODE (IEEE802154_PHY_OQPSK) |
Definition at line 148 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_SUBGHZ_CHANNEL (CONFIG_IEEE802154_DEFAULT_SUBGHZ_CHANNEL) |
Definition at line 112 of file at86rf215.h.
#define CONFIG_AT86RF215_DEFAULT_TXPOWER (CONFIG_IEEE802154_DEFAULT_TXPOWER) |
Default TX power (0dBm)
Definition at line 248 of file at86rf215.h.
#define CONFIG_AT86RF215_RPC_EN (0) |
Definition at line 121 of file at86rf215.h.
#define CONFIG_AT86RF215_TRIM_VAL (0) |
Trim value for the external crystal oscillator.
Each increment adds 300nF capacitance between the crystal oscillator pins TCXO and XTAL2. Range: 0..15 Use in conjunction with @see CONFIG_AT86RF215_USE_CLOCK_OUTPUT and a frequency meter connected to the clock output pin of the AT86RF215. Tweak the value until the measured clock output matches 26 MHz the best.
Definition at line 100 of file at86rf215.h.
#define CONFIG_AT86RF215_USE_CLOCK_OUTPUT |
Set to 1 if the clock output of the AT86RF215 is used as a clock source on the board.
Otherwise it is turned off to save energy.
Definition at line 84 of file at86rf215.h.