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cpu_conf.h
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1/*
2 * Copyright (C) 2017 Eistec AB
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser General
5 * Public License v2.1. See the file LICENSE in the top level directory for more
6 * details.
7 */
8
9#pragma once
10
20
21/* This is needed to homogenize the symbolic IRQ names across different versions
22 * of the vendor headers. These must be defined before any vendor headers are
23 * included */
24#define FTFA_IRQn FTF_IRQn
25#define FTFA_Collision_IRQn Read_Collision_IRQn
26#define FTFE_IRQn FTF_IRQn
27#define FTFE_Collision_IRQn Read_Collision_IRQn
28#define FTFL_IRQn FTF_IRQn
29#define FTFL_Collision_IRQn Read_Collision_IRQn
30#define PMC_IRQn LVD_LVW_IRQn
31#define Watchdog_IRQn WDOG_EWM_IRQn
32#define LVD_LVW_DCDC_IRQn LVD_LVW_IRQn
33
34/* Dispatch to a separate file per family */
35#if defined(KINETIS_SERIES_K)
36#include "cpu_conf_kinetis_k.h"
37#elif defined(KINETIS_SERIES_L)
38#include "cpu_conf_kinetis_l.h"
39#elif defined(KINETIS_SERIES_M)
40#include "cpu_conf_kinetis_m.h"
41#elif defined(KINETIS_SERIES_V)
42#include "cpu_conf_kinetis_v.h"
43#elif defined(KINETIS_SERIES_W)
44#include "cpu_conf_kinetis_w.h"
45#elif defined(KINETIS_SERIES_EA)
46#include "cpu_conf_kinetis_ea.h"
47#endif /* defined(KINETIS_SERIES_x) */
48
49#ifndef MCU_MEM_MAP_VERSION
50#error Missing vendor header for the chosen CPU_MODEL
51#endif
52#include "cpu_conf_kinetis.h"
53
54#ifdef __cplusplus
55extern "C"
56{
57#endif
58
63#ifdef BITBAND_REG32
64#define CPU_HAS_BITBAND 1
65/* SRAM_L is mapped before the bit-banding region, only SRAM_U can be used for bit-banding */
66#define CPU_HAS_SRAM_BITBAND 0
67#endif
69
70#ifdef __cplusplus
71}
72#endif
73
CPU specific definitions common to all Kinetis CPUs.
CPU specific implementations for the NXP Kinetis EA series of Cortex-M MCUs.
CPU specific implementations for the NXP Kinetis K series of Cortex-M MCUs.
CPU specific implementations for the NXP Kinetis L series of Cortex-M MCUs.
CPU specific implementations for the NXP Kinetis M series of Cortex-M MCUs.
CPU specific implementations for the NXP Kinetis V series of Cortex-M MCUs.
CPU specific implementations for the NXP Kinetis K series of Cortex-M MCUs.