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board.h
1/*
2 * SPDX-FileCopyrightText: 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
3 * SPDX-FileCopyrightText: 2016 Laurent Navet <laurent.navet@gmail.com>
4 * SPDX-FileCopyrightText: 2018 Matthew Blue <matthew.blue.neuro@gmail.com>
5 * SPDX-License-Identifier: LGPL-2.1-only
6 */
7
8#pragma once
9
10/*
11 * @ingroup boards_mega-xplained
12 * @brief Support for the Mega Xplained board.
13 * @{
14 *
15 * @file
16 * @brief Board specific definitions for the Mega Xplained board.
17 *
18 * @author Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
19 * @author Laurent Navet <laurent.navet@gmail.com>
20 * @author Matthew Blue <matthew.blue.neuro@gmail.com>
21 */
22
23#include "cpu.h"
24#include "periph_cpu.h"
26
27#ifdef __cplusplus
28extern "C" {
29#endif
30
38#ifndef STDIO_UART_BAUDRATE
39#define STDIO_UART_BAUDRATE (9600U)
40#endif
42
46#define STDIO_UART_DEV (UART_DEV(1))
47
54#define XTIMER_DEV (0)
55#define XTIMER_CHAN (0)
56#define XTIMER_WIDTH (16)
57#define XTIMER_HZ (125000UL)
58#define XTIMER_BACKOFF (40)
60
65/* LED0,2 currently unsupported due to lack of GPIO_OD support */
66#define LED1_PIN GPIO_PIN(PORT_B, 3)
67#define LED1_MODE GPIO_OUT
68
69#define LED3_PIN GPIO_PIN(PORT_B, 2)
70#define LED3_MODE GPIO_OUT
72
77/* LED0,2 currently unsupported due to lack of GPIO_OD support */
78#define LED1_ENABLE_PORT DDRB |= LED1_PIN
79#define LED1_ON PORTB |= LED1_PIN
80#define LED1_OFF PORTB &= ~LED1_PIN
81#define LED1_TOGGLE PORTB ^= LED1_PIN
82
83#define LED3_ENABLE_PORT DDRB |= LED3_PIN
84#define LED3_ON PORTB |= LED3_PIN
85#define LED3_OFF PORTB &= ~LED3_PIN
86#define LED3_TOGGLE PORTB ^= LED3_PIN
88
93#define LED_PANIC LED1_ON
95
100#define BTN0_PIN GPIO_PIN(PORT_B, 0)
101#define BTN0_MODE GPIO_IN
102
103#define BTN1_PIN GPIO_PIN(PORT_B, 1)
104#define BTN1_MODE GPIO_IN
105
106/* BTN2 currently unsupported due to lack of GPIO_OD support */
107
112#define NTC_OUTPUT ADC_LINE(7)
113#define LIGHT_SENSOR_OUTPUT ADC_LINE(6)
114#define FILTER_OUTPUT ADC_LINE(5)
116
121#define CPU_ATMEGA_CLK_SCALE_INIT CPU_ATMEGA_CLK_SCALE_DIV1
123
124#ifdef __cplusplus
125}
126#endif
127
Mapping from MCU pins to Mega Xplained pins.