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cfg_timer_default.h
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1/*
2 * SPDX-FileCopyrightText: 2018 Inria
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
18
19#include "kernel_defines.h"
20#include "periph_cpu.h"
21
22#ifdef __cplusplus
23extern "C" {
24#endif
25
36static const timer_conf_t timer_config[] = {
37 {
38 .dev = NRF_TIMER1,
39 .channels = 3,
40 .bitmode = TIMER_BITMODE_BITMODE_32Bit,
41 .irqn = TIMER1_IRQn
42 },
43 {
44 /* BEWARE: This timer is allocated to the nRF52 IEEE 802.15.4 driver.
45 * Do not use this timer (unless you do not use IEEE 802.15.4
46 * networking)!
47 */
48 .dev = NRF_TIMER2,
49 .channels = 3,
50 .bitmode = TIMER_BITMODE_BITMODE_32Bit,
51 .irqn = TIMER2_IRQn
52 },
53 /* The later timers are only present on the larger NRF52 CPUs like NRF52840
54 * or NRF52833, but not small ones like NRF52810. They do have 2 channels
55 * more (CC registers [0..5] instead of CC registers [0..3]). */
56#ifdef NRF_TIMER3
57 {
58 .dev = NRF_TIMER3,
59 .channels = 5,
60 .bitmode = TIMER_BITMODE_BITMODE_32Bit,
61 .irqn = TIMER3_IRQn
62 },
63#endif
64#ifdef NRF_TIMER4
65 {
66 .dev = NRF_TIMER4,
67 .channels = 5,
68 .bitmode = TIMER_BITMODE_BITMODE_32Bit,
69 .irqn = TIMER4_IRQn
70 }
71#endif
72};
73
74#define TIMER_0_ISR isr_timer1
75#define TIMER_1_ISR isr_timer2
76#define TIMER_2_ISR isr_timer3
77#define TIMER_3_ISR isr_timer4
78
80#define TIMER_0_MAX_VALUE 0xffffffff
82#define TIMER_1_MAX_VALUE 0xffffffff
83#ifdef NRF_TIMER3
85#define TIMER_2_MAX_VALUE 0xffffffff
86#endif
87/* If there is no NRF_TIMER3 this should be TIMER_2 because the index shifts
88 * up, but there is only a TIMER4 if there is a TIMER3 too. */
89#ifdef NRF_TIMER4
91#define TIMER_3_MAX_VALUE 0xffffffff
92#endif
93
94#define TIMER_NUMOF ARRAY_SIZE(timer_config)
96
97#ifdef __cplusplus
98}
99#endif
100
Common macros and compiler attributes/pragmas configuration.
Timer device configuration.
Definition periph_cpu.h:260