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periph_cpu.h
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1/*
2 * Copyright (C) 2015-2017 Freie Universität Berlin
3 * 2017 Inria
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
10#pragma once
11
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28#ifndef DOXYGEN
29
34#define STM32_BOOTLOADER_ADDR (0x1FF00000)
35
40#define HAVE_ADC_RES_T
41typedef enum {
42 ADC_RES_6BIT = (ADC_CFGR1_RES),
43 ADC_RES_8BIT = (ADC_CFGR1_RES_1),
44 ADC_RES_10BIT = (ADC_CFGR1_RES_0),
45 ADC_RES_12BIT = (0x00),
46 ADC_RES_14BIT = (0xfe),
47 ADC_RES_16BIT = (0xff)
48} adc_res_t;
50#endif /* ndef DOXYGEN */
51
57#define EEPROM_START_ADDR (0x08080000)
58#if defined(CPU_LINE_STM32L073xx) || defined(CPU_LINE_STM32L072xx)
59#define EEPROM_SIZE (6144U) /* 6kB */
60#elif defined(CPU_LINE_STM32L053xx) || defined(CPU_LINE_STM32L052xx)
61#define EEPROM_SIZE (2048U) /* 2kB */
62#elif defined(CPU_LINE_STM32L031xx)
63#define EEPROM_SIZE (1024U) /* 1kB */
64#elif defined(CPU_LINE_STM32L010xB) || defined(CPU_LINE_STM32L011x3) || \
65 defined(CPU_LINE_STM32L011x4) || defined(CPU_LINE_STM32L021x4) || \
66 defined(CPU_MODEL_STM32L011K4)
67#define EEPROM_SIZE (512U) /* 512B */
68#elif defined(CPU_LINE_STM32L010x6) || defined(CPU_LINE_STM32L010x8)
69#define EEPROM_SIZE (256U) /* 256B */
70#elif defined(CPU_LINE_STM32L010x4)
71#define EEPROM_SIZE (128U) /* 128B */
72#endif
74
75#ifdef __cplusplus
76}
77#endif
78
adc_res_t
Possible ADC resolution settings.
Definition adc.h:92
@ ADC_RES_16BIT
ADC resolution: 16 bit.
Definition adc.h:98
@ ADC_RES_8BIT
ADC resolution: 8 bit.
Definition adc.h:94
@ ADC_RES_14BIT
ADC resolution: 14 bit.
Definition adc.h:97
@ ADC_RES_6BIT
ADC resolution: 6 bit.
Definition adc.h:93
@ ADC_RES_10BIT
ADC resolution: 10 bit.
Definition adc.h:95
@ ADC_RES_12BIT
ADC resolution: 12 bit.
Definition adc.h:96