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Data Fields
sam0_aux_cfg_mapping Struct Reference

NVM User Row Mapping - Dedicated Entries Config values will be applied at power-on. More...

Detailed Description

NVM User Row Mapping - Dedicated Entries Config values will be applied at power-on.

NVM User Page Mapping - Dedicated Entries Config values will be applied at power-on.

Definition at line 176 of file periph_cpu.h.

#include <periph_cpu.h>

Data Fields

uint64_t bootloader_size: 3
 BOOTPROT: Bootloader Size.
 
uint64_t reserved_0: 1
 Factory settings - do not change.
 
uint64_t eeprom_size: 3
 one of eight different EEPROM sizes
 
uint64_t reserved_1: 1
 Factory settings - do not change.
 
uint64_t bod33_level: 6
 BOD33 threshold level at power-on.
 
uint64_t bod33_enable: 1
 BOD33 Enable at power-on.
 
uint64_t bod33_action: 2
 BOD33 Action at power-on.
 
uint64_t reserved_2: 8
 Factory settings - do not change.
 
uint64_t wdt_enable: 1
 WDT Enable at power-on.
 
uint64_t wdt_always_on: 1
 WDT Always-On at power-on.
 
uint64_t wdt_period: 4
 WDT Period at power-on.
 
uint64_t wdt_window: 4
 WDT Window at power-on.
 
uint64_t wdt_ewoffset: 4
 WDT Early Warning Interrupt Offset.
 
uint64_t wdt_window_enable: 1
 WDT Window mode enabled on power-on.
 
uint64_t bod33_hysteresis: 1
 BOD33 Hysteresis configuration.
 
const uint64_t bod12_calibration: 1
 Factory settings - do not change.
 
uint64_t reserved_3: 6
 Factory settings - do not change.
 
uint64_t nvm_locks: 16
 NVM Region Lock Bits.
 
uint32_t bod33_disable: 1
 BOD33 Disable at power-on.
 
uint32_t bod33_level: 8
 BOD33 threshold level at power-on.
 
uint32_t bod33_action: 2
 BOD33 Action at power-on.
 
uint32_t bod33_hysteresis: 4
 BOD33 Hysteresis configuration.
 
const uint32_t bod12_calibration: 11
 Factory settings - do not change.
 
uint32_t nvm_boot_size: 4
 NVM Bootloader Size.
 
uint32_t reserved_0: 2
 Factory settings - do not change.
 
uint32_t smart_eeprom_blocks: 4
 NVM Blocks per SmartEEPROM sector.
 
uint32_t smart_eeprom_page_size: 3
 SmartEEPROM Page Size.
 
uint32_t ram_eccdis: 1
 RAM ECC Disable.
 
uint32_t reserved_1: 8
 Factory settings - do not change.
 
uint32_t wdt_enable: 1
 WDT Enable at power-on.
 
uint32_t wdt_always_on: 1
 WDT Always-On at power-on.
 
uint32_t wdt_period: 4
 WDT Period at power-on.
 
uint32_t wdt_window: 4
 WDT Window at power-on.
 
uint32_t wdt_ewoffset: 4
 WDT Early Warning Interrupt Offset.
 
uint32_t wdt_window_enable: 1
 WDT Window mode enabled on power-on.
 
uint32_t reserved_2: 1
 Factory settings - do not change.
 
uint32_t nvm_locks
 NVM Region Lock Bits.
 
uint32_t user_page
 User page.
 
uint32_t reserved_3
 Factory settings - do not change.
 
uint32_t user_pages [3]
 User pages.
 
uint32_t secure_region_unlock: 3
 NVM Secure Region UnLock Bits.
 
uint32_t non_secure_region_unlock: 3
 NVM Non-Secure Region UnLock Bits.
 
uint32_t wdt_run_standby: 1
 WDT Runstdby at power-on.
 
uint32_t ram_execute_never: 1
 RAM is eXecute Never.
 
uint32_t data_execute_never: 1
 Data Flash is eXecute Never.
 
uint32_t secure_flash_as_size: 8
 Secure Flash (AS region) Size = AS*0x100.
 
uint32_t nsc_size: 6
 Non-Secure Callable Flash (APPLICATION region) Size = ANSC*0x20.
 
uint32_t secure_flash_data_size: 4
 Secure Data Flash Size = DS*0x100.
 
uint32_t reserved_4: 4
 Reserved.
 
uint32_t secure_ram_size: 7
 Secure SRAM Size = RS*0x80.
 
uint32_t reserved_5: 1
 Reserved.
 
uint32_t user_row_write_enable: 1
 User Row Write Enable.
 
uint32_t reserved_6: 31
 Reserved.
 
uint32_t nonsec_a
 Peripherals Non-Secure Status Fuses for Bridge A.
 
uint32_t nonsec_b
 Peripherals Non-Secure Status Fuses for Bridge B.
 
uint32_t nonsec_c
 Peripherals Non-Secure Status Fuses for Bridge C.
 
uint32_t user_crc
 CRC of NVM User Row bits 223:64 (words 2…6)
 

Field Documentation

◆ bod12_calibration [1/2]

const uint32_t sam0_aux_cfg_mapping::bod12_calibration

Factory settings - do not change.

Definition at line 192 of file periph_cpu.h.

◆ bod12_calibration [2/2]

const uint32_t sam0_aux_cfg_mapping::bod12_calibration

Factory settings - do not change.

Definition at line 239 of file periph_cpu.h.

◆ bod33_action [1/2]

uint64_t sam0_aux_cfg_mapping::bod33_action

BOD33 Action at power-on.

Definition at line 183 of file periph_cpu.h.

◆ bod33_action [2/2]

uint32_t sam0_aux_cfg_mapping::bod33_action

BOD33 Action at power-on.

Definition at line 237 of file periph_cpu.h.

◆ bod33_disable

uint32_t sam0_aux_cfg_mapping::bod33_disable

BOD33 Disable at power-on.

Definition at line 235 of file periph_cpu.h.

◆ bod33_enable

uint64_t sam0_aux_cfg_mapping::bod33_enable

BOD33 Enable at power-on.

Definition at line 182 of file periph_cpu.h.

◆ bod33_hysteresis [1/2]

uint64_t sam0_aux_cfg_mapping::bod33_hysteresis

BOD33 Hysteresis configuration.

Definition at line 191 of file periph_cpu.h.

◆ bod33_hysteresis [2/2]

uint32_t sam0_aux_cfg_mapping::bod33_hysteresis

BOD33 Hysteresis configuration.

Definition at line 238 of file periph_cpu.h.

◆ bod33_level [1/2]

uint64_t sam0_aux_cfg_mapping::bod33_level

BOD33 threshold level at power-on.

Definition at line 181 of file periph_cpu.h.

◆ bod33_level [2/2]

uint32_t sam0_aux_cfg_mapping::bod33_level

BOD33 threshold level at power-on.

Definition at line 236 of file periph_cpu.h.

◆ bootloader_size

uint64_t sam0_aux_cfg_mapping::bootloader_size

BOOTPROT: Bootloader Size.

Definition at line 177 of file periph_cpu.h.

◆ data_execute_never

uint32_t sam0_aux_cfg_mapping::data_execute_never

Data Flash is eXecute Never.

Definition at line 134 of file periph_cpu.h.

◆ eeprom_size

uint64_t sam0_aux_cfg_mapping::eeprom_size

one of eight different EEPROM sizes

Definition at line 179 of file periph_cpu.h.

◆ non_secure_region_unlock

uint32_t sam0_aux_cfg_mapping::non_secure_region_unlock

NVM Non-Secure Region UnLock Bits.

Definition at line 117 of file periph_cpu.h.

◆ nonsec_a

uint32_t sam0_aux_cfg_mapping::nonsec_a

Peripherals Non-Secure Status Fuses for Bridge A.

Definition at line 148 of file periph_cpu.h.

◆ nonsec_b

uint32_t sam0_aux_cfg_mapping::nonsec_b

Peripherals Non-Secure Status Fuses for Bridge B.

Definition at line 150 of file periph_cpu.h.

◆ nonsec_c

uint32_t sam0_aux_cfg_mapping::nonsec_c

Peripherals Non-Secure Status Fuses for Bridge C.

Definition at line 152 of file periph_cpu.h.

◆ nsc_size

uint32_t sam0_aux_cfg_mapping::nsc_size

Non-Secure Callable Flash (APPLICATION region) Size = ANSC*0x20.

Definition at line 138 of file periph_cpu.h.

◆ nvm_boot_size

uint32_t sam0_aux_cfg_mapping::nvm_boot_size

NVM Bootloader Size.

Definition at line 240 of file periph_cpu.h.

◆ nvm_locks [1/2]

uint64_t sam0_aux_cfg_mapping::nvm_locks

NVM Region Lock Bits.

Definition at line 194 of file periph_cpu.h.

◆ nvm_locks [2/2]

uint32_t sam0_aux_cfg_mapping::nvm_locks

NVM Region Lock Bits.

Definition at line 255 of file periph_cpu.h.

◆ ram_eccdis

uint32_t sam0_aux_cfg_mapping::ram_eccdis

RAM ECC Disable.

Definition at line 245 of file periph_cpu.h.

◆ ram_execute_never

uint32_t sam0_aux_cfg_mapping::ram_execute_never

RAM is eXecute Never.

Definition at line 133 of file periph_cpu.h.

◆ reserved_0 [1/2]

uint64_t sam0_aux_cfg_mapping::reserved_0

Factory settings - do not change.

Reserved.

Definition at line 178 of file periph_cpu.h.

◆ reserved_0 [2/2]

uint32_t sam0_aux_cfg_mapping::reserved_0

Factory settings - do not change.

Reserved.

Definition at line 241 of file periph_cpu.h.

◆ reserved_1 [1/2]

uint64_t sam0_aux_cfg_mapping::reserved_1

Factory settings - do not change.

Reserved.

Definition at line 180 of file periph_cpu.h.

◆ reserved_1 [2/2]

uint32_t sam0_aux_cfg_mapping::reserved_1

Factory settings - do not change.

Reserved.

Definition at line 246 of file periph_cpu.h.

◆ reserved_2 [1/2]

uint64_t sam0_aux_cfg_mapping::reserved_2

Factory settings - do not change.

Reserved.

Definition at line 184 of file periph_cpu.h.

◆ reserved_2 [2/2]

uint32_t sam0_aux_cfg_mapping::reserved_2

Factory settings - do not change.

Reserved.

Definition at line 253 of file periph_cpu.h.

◆ reserved_3 [1/2]

uint64_t sam0_aux_cfg_mapping::reserved_3

Factory settings - do not change.

Reserved.

Definition at line 193 of file periph_cpu.h.

◆ reserved_3 [2/2]

uint32_t sam0_aux_cfg_mapping::reserved_3

Factory settings - do not change.

Reserved.

Definition at line 259 of file periph_cpu.h.

◆ reserved_4

uint32_t sam0_aux_cfg_mapping::reserved_4

Reserved.

Definition at line 141 of file periph_cpu.h.

◆ reserved_5

uint32_t sam0_aux_cfg_mapping::reserved_5

Reserved.

Definition at line 143 of file periph_cpu.h.

◆ reserved_6

uint32_t sam0_aux_cfg_mapping::reserved_6

Reserved.

Definition at line 146 of file periph_cpu.h.

◆ secure_flash_as_size

uint32_t sam0_aux_cfg_mapping::secure_flash_as_size

Secure Flash (AS region) Size = AS*0x100.

Definition at line 137 of file periph_cpu.h.

◆ secure_flash_data_size

uint32_t sam0_aux_cfg_mapping::secure_flash_data_size

Secure Data Flash Size = DS*0x100.

Definition at line 140 of file periph_cpu.h.

◆ secure_ram_size

uint32_t sam0_aux_cfg_mapping::secure_ram_size

Secure SRAM Size = RS*0x80.

Definition at line 142 of file periph_cpu.h.

◆ secure_region_unlock

uint32_t sam0_aux_cfg_mapping::secure_region_unlock

NVM Secure Region UnLock Bits.

Definition at line 116 of file periph_cpu.h.

◆ smart_eeprom_blocks

uint32_t sam0_aux_cfg_mapping::smart_eeprom_blocks

NVM Blocks per SmartEEPROM sector.

Definition at line 243 of file periph_cpu.h.

◆ smart_eeprom_page_size

uint32_t sam0_aux_cfg_mapping::smart_eeprom_page_size

SmartEEPROM Page Size.

Definition at line 244 of file periph_cpu.h.

◆ user_crc

uint32_t sam0_aux_cfg_mapping::user_crc

CRC of NVM User Row bits 223:64 (words 2…6)

Definition at line 154 of file periph_cpu.h.

◆ user_page

uint32_t sam0_aux_cfg_mapping::user_page

User page.

Definition at line 257 of file periph_cpu.h.

◆ user_pages

uint32_t sam0_aux_cfg_mapping::user_pages[3]

User pages.

Definition at line 261 of file periph_cpu.h.

◆ user_row_write_enable

uint32_t sam0_aux_cfg_mapping::user_row_write_enable

User Row Write Enable.

Definition at line 145 of file periph_cpu.h.

◆ wdt_always_on [1/2]

uint64_t sam0_aux_cfg_mapping::wdt_always_on

WDT Always-On at power-on.

Definition at line 186 of file periph_cpu.h.

◆ wdt_always_on [2/2]

uint32_t sam0_aux_cfg_mapping::wdt_always_on

WDT Always-On at power-on.

Definition at line 248 of file periph_cpu.h.

◆ wdt_enable [1/2]

uint64_t sam0_aux_cfg_mapping::wdt_enable

WDT Enable at power-on.

Definition at line 185 of file periph_cpu.h.

◆ wdt_enable [2/2]

uint32_t sam0_aux_cfg_mapping::wdt_enable

WDT Enable at power-on.

Definition at line 247 of file periph_cpu.h.

◆ wdt_ewoffset [1/2]

uint64_t sam0_aux_cfg_mapping::wdt_ewoffset

WDT Early Warning Interrupt Offset.

Definition at line 189 of file periph_cpu.h.

◆ wdt_ewoffset [2/2]

uint32_t sam0_aux_cfg_mapping::wdt_ewoffset

WDT Early Warning Interrupt Offset.

Definition at line 251 of file periph_cpu.h.

◆ wdt_period [1/2]

uint64_t sam0_aux_cfg_mapping::wdt_period

WDT Period at power-on.

Definition at line 187 of file periph_cpu.h.

◆ wdt_period [2/2]

uint32_t sam0_aux_cfg_mapping::wdt_period

WDT Period at power-on.

Definition at line 249 of file periph_cpu.h.

◆ wdt_run_standby

uint32_t sam0_aux_cfg_mapping::wdt_run_standby

WDT Runstdby at power-on.

Definition at line 123 of file periph_cpu.h.

◆ wdt_window [1/2]

uint64_t sam0_aux_cfg_mapping::wdt_window

WDT Window at power-on.

Definition at line 188 of file periph_cpu.h.

◆ wdt_window [2/2]

uint32_t sam0_aux_cfg_mapping::wdt_window

WDT Window at power-on.

Definition at line 250 of file periph_cpu.h.

◆ wdt_window_enable [1/2]

uint64_t sam0_aux_cfg_mapping::wdt_window_enable

WDT Window mode enabled on power-on.

Definition at line 190 of file periph_cpu.h.

◆ wdt_window_enable [2/2]

uint32_t sam0_aux_cfg_mapping::wdt_window_enable

WDT Window mode enabled on power-on.

Definition at line 252 of file periph_cpu.h.

The documentation for this struct was generated from the following files: