vectors_cortexm.h

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/*
 * SPDX-FileCopyrightText: 2015 Freie Universität Berlin
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once

 
#ifdef __cplusplus
extern "C" {
#endif
 
#include "cpu_conf.h"

#define WEAK_DEFAULT    __attribute__((weak,alias("dummy_handler")))

#define ISR_VECTOR(x)   __attribute__((used,section(".vectors." # x )))

#define CPU_NONISR_EXCEPTIONS   (15)

typedef void (*isr_t)(void);

typedef struct {
    void* _estack;                          
    isr_t vectors[CPU_NONISR_EXCEPTIONS];   
} cortexm_base_t;

void reset_handler_default(void);

void nmi_handler(void);

void hard_fault_default(void);
 
/* The following four exceptions are only present for Cortex-M3 and -M4 CPUs */
#if defined(CPU_CORE_CORTEX_M3) || defined(CPU_CORE_CORTEX_M4) || \
    defined(CPU_CORE_CORTEX_M4F) || defined(CPU_CORE_CORTEX_M7)
void mem_manage_default(void);

void bus_fault_default(void);

void usage_fault_default(void);

void debug_mon_default(void);
#endif

void dummy_handler_default(void);
 
#ifdef __cplusplus
}
#endif