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periph_conf.h
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1#pragma once
2
3 /*
4 * Copyright (C) 2014-2015,2017 Freie Universität Berlin
5 *
6 * This file is subject to the terms and conditions of the GNU Lesser
7 * General Public License v2.1. See the file LICENSE in the top level
8 * directory for more details.
9 */
10
22
23#include "periph_cpu.h"
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
33/* targeted system core clock */
34#define CLOCK_CORECLOCK (84000000UL)
35/* external oscillator clock */
36#define CLOCK_EXT_OSC (12000000UL)
37/* define PLL configuration
38 *
39 * The values must fulfill this equation:
40 * CORECLOCK = (EXT_OCS / PLL_DIV) * (PLL_MUL + 1)
41 */
42#define CLOCK_PLL_MUL (83)
43#define CLOCK_PLL_DIV (12)
44
45/* number of wait states before flash read and write operations */
46#define CLOCK_FWS (4) /* 4 is save for 84MHz */
48
55#ifndef CLOCK_SCLK_XTAL
56#define CLOCK_SCLK_XTAL (0)
57#endif
58
63static const timer_conf_t timer_config[] = {
64 { .dev = TC0, .id_ch0 = ID_TC0 },
65 { .dev = TC1, .id_ch0 = ID_TC3 }
66};
67
68#define TIMER_0_ISR isr_tc0
69#define TIMER_1_ISR isr_tc3
70
71#define TIMER_NUMOF ARRAY_SIZE(timer_config)
73
78#ifndef RTT_FREQUENCY
79#define RTT_FREQUENCY (1U) /* 1Hz */
80#endif
82
87static const uart_conf_t uart_config[] = {
88 {
89 .dev = (Uart *)UART,
90 .rx_pin = GPIO_PIN(PA, 8),
91 .tx_pin = GPIO_PIN(PA, 9),
92 .mux = GPIO_MUX_A,
93 .pmc_id = ID_UART,
94 .irqn = UART_IRQn
95 },
96 {
97 .dev = (Uart *)USART0,
98 .rx_pin = GPIO_PIN(PA, 10),
99 .tx_pin = GPIO_PIN(PA, 11),
100 .mux = GPIO_MUX_A,
101 .pmc_id = ID_USART0,
102 .irqn = USART0_IRQn
103 },
104 {
105 .dev = (Uart *)USART1,
106 .rx_pin = GPIO_PIN(PA, 12),
107 .tx_pin = GPIO_PIN(PA, 13),
108 .mux = GPIO_MUX_A,
109 .pmc_id = ID_USART1,
110 .irqn = USART1_IRQn
111 },
112 {
113 .dev = (Uart *)USART3,
114 .rx_pin = GPIO_PIN(PD, 5),
115 .tx_pin = GPIO_PIN(PD, 4),
116 .mux = GPIO_MUX_B,
117 .pmc_id = ID_USART3,
118 .irqn = USART3_IRQn
119 }
120};
121
122/* define interrupt vectors */
123#define UART_0_ISR isr_uart
124#define UART_1_ISR isr_usart0
125#define UART_2_ISR isr_usart1
126#define UART_3_ISR isr_usart3
127
128#define UART_NUMOF ARRAY_SIZE(uart_config)
130
135static const spi_conf_t spi_config[] = {
136 {
137 .dev = SPI0,
138 .id = ID_SPI0,
139 .clk = GPIO_PIN(PA, 27),
140 .mosi = GPIO_PIN(PA, 26),
141 .miso = GPIO_PIN(PA, 25),
142 .mux = GPIO_MUX_A
143 }
144};
145
146#define SPI_NUMOF ARRAY_SIZE(spi_config)
148
153static const pwm_chan_conf_t pwm_chan[] = {
154 { .pin = GPIO_PIN(PC, 21), .hwchan = 4 },
155 { .pin = GPIO_PIN(PC, 22), .hwchan = 5 },
156 { .pin = GPIO_PIN(PC, 23), .hwchan = 6 },
157 { .pin = GPIO_PIN(PC, 24), .hwchan = 7 }
158};
159
160#define PWM_NUMOF (1U)
161#define PWM_CHAN_NUMOF ARRAY_SIZE(pwm_chan)
163
164#ifdef __cplusplus
165}
166#endif
167
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
@ PC
port C
@ PA
port A
@ PD
port D
@ GPIO_MUX_A
select peripheral function A
@ GPIO_MUX_B
select peripheral function B
PWM channel configuration.
Definition periph_cpu.h:467
SPI device configuration.
Definition periph_cpu.h:336
Timer device configuration.
Definition periph_cpu.h:263
UART device configuration.
Definition periph_cpu.h:217