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periph_conf.h
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1/*
2 * Copyright (C) 2019 Inria
3 * 2019 Freie Universität Berlin
4 * 2019 Kaspar Schleiser <kaspar@schleiser.de>
5 *
6 * This file is subject to the terms and conditions of the GNU Lesser
7 * General Public License v2.1. See the file LICENSE in the top level
8 * directory for more details.
9 */
10
11#pragma once
12
23
24#include "periph_cpu.h"
25#include "cfg_clock_32_1.h"
26#include "cfg_rtt_default.h"
27#include "cfg_timer_default.h"
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
37static const spi_conf_t spi_config[] = {
38 {
39 .dev = NRF_SPIM0,
40 .sclk = GPIO_PIN(0, 2),
41 .mosi = GPIO_PIN(0, 3),
42 .miso = GPIO_PIN(0, 4),
43 .ppi = 0,
44 }
45};
46
47#define SPI_NUMOF ARRAY_SIZE(spi_config)
49
54static const i2c_conf_t i2c_config[] = {
55 {
56 .dev = NRF_TWIM1,
57 .scl = GPIO_PIN(0, 7),
58 .sda = GPIO_PIN(0, 6),
59 .speed = I2C_SPEED_FAST
60 }
61};
62
63#define I2C_NUMOF ARRAY_SIZE(i2c_config)
65
66#ifdef __cplusplus
67}
68#endif
69
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition periph_cpu.h:278
Common clock configuration for the nRF52 based boards.
I2C configuration structure.
Definition periph_cpu.h:298
SPI device configuration.
Definition periph_cpu.h:336