Loading...
Searching...
No Matches
periph_conf.h
Go to the documentation of this file.
1/*
2 * SPDX-FileCopyrightText: 2017 Freie Universität Berlin
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
18
19#include "periph_cpu.h"
20#include "cfg_clock_32_1.h"
21#include "cfg_rtt_default.h"
22#include "cfg_timer_default.h"
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
32static const spi_conf_t spi_config[] = {
33 {
34 .dev = NRF_SPIM0,
35 .sclk = 29,
36 .mosi = 25,
37 .miso = 28,
38 .ppi = 0,
39 }
40};
41
42#define SPI_NUMOF ARRAY_SIZE(spi_config)
44
49static const uart_conf_t uart_config[] = {
50 {
51 .dev = NRF_UARTE0,
52 .rx_pin = GPIO_PIN(0, 4),
53 .tx_pin = GPIO_PIN(0, 5),
54#ifdef MODULE_PERIPH_UART_HW_FC
55 .rts_pin = GPIO_UNDEF,
56 .cts_pin = GPIO_UNDEF,
57#endif
58 .irqn = UARTE0_UART0_IRQn,
59 },
60};
61
62#define UART_NUMOF ARRAY_SIZE(uart_config)
63#define UART_0_ISR (isr_uart0)
65
66#ifdef __cplusplus
67}
68#endif
69
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Common clock configuration for the nRF52 based boards.
SPI device configuration.
Definition periph_cpu.h:333
UART device configuration.
Definition periph_cpu.h:214