periph_cpu_common.h

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/*
 * SPDX-FileCopyrightText: 2015 HAW Hamburg
 * SPDX-FileCopyrightText: 2016 Freie Universität Berlin
 * SPDX-FileCopyrightText: 2016 INRIA
 * SPDX-FileCopyrightText: 2023 Hugues Larrive
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once

 
#include "cpu.h"
 
#ifdef __cplusplus
extern "C" {
#endif

#define CPUID_LEN           (4U)
 
#ifndef DOXYGEN
#define HAVE_GPIO_T
typedef uint8_t gpio_t;
#endif

#define GPIO_UNDEF          (0xff)

#define GPIO_PIN(x, y)          ((x << 4) | y)

#if (defined(OCF1A) && defined(OCF1B) && (OCF1A > OCF1B)) \
    || (defined(PUD) && (PUD != 4)) || (defined(INT0) && (INT0 == 6))
    /* match with 65 devices against 61 for (PORTB == _SFR_IO8(0x18)) which
     * did not work here anyway */
#define GPIO_PORT_DESCENDENT
#endif
 
#ifdef GPIO_PORT_DESCENDENT
#ifdef      _AVR_ATTINY1634_H_INCLUDED
/*          the only one that requires particular treatment! */
#define     ATMEGA_GPIO_BASE_A  0x2F
#else
/*          all other port descendent, including :
             - _AVR_IO8534_ (only have port A but with 0x1B address) ;
             - _AVR_IOAT94K_H_ (only have ports D and E) ;
             - _AVR_IOTN28_H_ (only have ports A and D). */
#define     ATMEGA_GPIO_BASE_A  0x39
#endif /*   _AVR_ATTINY1634_H_INCLUDED */
#else /* !GPIO_PORT_DESCENDENT */
#define     ATMEGA_GPIO_BASE_A  0x20
#endif /* GPIO_PORT_DESCENDENT */
#define ATMEGA_GPIO_BASE_G      (ATMEGA_GPIO_BASE_A + ATMEGA_GPIO_SIZE * ('G' - 'A'))
#define ATMEGA_GPIO_BASE_H      (0x100)
#define ATMEGA_GPIO_SIZE        (0x03)
 
#if defined(DOXYGEN)
#define GPIO_EXT_INT_NUMOF      <CPU_SPECIFIC>
#elif defined(INT7_vect)
#define GPIO_EXT_INT_NUMOF      (8U)
#elif defined(INT6_vect)
#define GPIO_EXT_INT_NUMOF      (7U)
#elif defined(INT5_vect)
#define GPIO_EXT_INT_NUMOF      (6U)
#elif defined(INT4_vect)
#define GPIO_EXT_INT_NUMOF      (5U)
#elif defined(INT3_vect)
#define GPIO_EXT_INT_NUMOF      (4U)
#elif defined(INT2_vect)
#define GPIO_EXT_INT_NUMOF      (3U)
#else
#define GPIO_EXT_INT_NUMOF      (2U)
#endif

typedef struct {
    volatile uint8_t pin;
    volatile uint8_t ddr;
    volatile uint8_t port;
} atmega_gpio_port_t;

static inline atmega_gpio_port_t *atmega_gpio_port(uint8_t port_num)
{
    static const uintptr_t base_addr = (uintptr_t)ATMEGA_GPIO_BASE_A;
#ifdef GPIO_PORT_DESCENDENT
    uintptr_t res = base_addr - port_num * sizeof(atmega_gpio_port_t);
#else
    uintptr_t res = base_addr + port_num * sizeof(atmega_gpio_port_t);
#endif
    /* GPIO ports up to (including) G are mapped in the I/O address space,
     * port H and higher (if present) are mapped in a different contiguous
     * region afterwards (e.g. 0x100 for ATmega2560). */
#ifdef PORTH
    if (port_num > 'G'-'A') {
        static const uintptr_t offset = ATMEGA_GPIO_BASE_H - ATMEGA_GPIO_BASE_G;
        res += offset;
    }
#endif
 
    return (atmega_gpio_port_t *)res;
}
 
#ifndef DOXYGEN
#define HAVE_GPIO_FLANK_T
typedef enum {
    GPIO_LOW,          
    GPIO_BOTH,         
    GPIO_FALLING,      
    GPIO_RISING,       
} gpio_flank_t;
#endif /* ndef DOXYGEN */
 
#ifndef DOXYGEN /* BEGIN: GPIO LL overwrites */
#define HAVE_GPIO_SLEW_T
typedef enum {
    GPIO_SLEW_SLOWEST = 0,
    GPIO_SLEW_SLOW = 0,
    GPIO_SLEW_FAST = 0,
    GPIO_SLEW_FASTEST = 0,
} gpio_slew_t;
 
#define HAVE_GPIO_PULL_STRENGTH_T
typedef enum {
    GPIO_PULL_WEAKEST = 0,
    GPIO_PULL_WEAK = 0,
    GPIO_PULL_STRONG = 0,
    GPIO_PULL_STRONGEST = 0
} gpio_pull_strength_t;
 
#define HAVE_GPIO_DRIVE_STRENGTH_T
typedef enum {
    GPIO_DRIVE_WEAKEST = 0,
    GPIO_DRIVE_WEAK = 0,
    GPIO_DRIVE_STRONG = 0,
    GPIO_DRIVE_STRONGEST = 0
} gpio_drive_strength_t;
 
#define HAVE_GPIO_IRQ_TRIG_T
typedef enum {
    GPIO_TRIGGER_LEVEL_LOW      = 0x00,
    GPIO_TRIGGER_EDGE_BOTH      = 0x01,
    GPIO_TRIGGER_EDGE_FALLING   = 0x02,
    GPIO_TRIGGER_EDGE_RISING    = 0x03,
    GPIO_TRIGGER_LEVEL_HIGH     = 0xff, 
} gpio_irq_trig_t;
 
#define HAVE_GPIO_STATE_T
typedef enum {
    GPIO_INPUT,
    GPIO_OUTPUT_PUSH_PULL,
    GPIO_OUTPUT_OPEN_DRAIN,     
    GPIO_OUTPUT_OPEN_SOURCE,    
    GPIO_USED_BY_PERIPHERAL,    
    GPIO_DISCONNECT             = GPIO_INPUT,
} gpio_state_t;
 
#define HAVE_GPIO_LL_PREPARE_WRITE_ALL_PINS
#define HAVE_GPIO_LL_PREPARE_WRITE
 
#endif /* END: GPIO LL overwrites */

#define PERIPH_SPI_NEEDS_INIT_CS
#define PERIPH_SPI_NEEDS_TRANSFER_BYTE
#define PERIPH_SPI_NEEDS_TRANSFER_REG
#define PERIPH_SPI_NEEDS_TRANSFER_REGS
 
#ifndef DOXYGEN
#define SPI_MODE_SEL(pol, pha)          ((pol << 3) | (pha << 2))

#define HAVE_SPI_MODE_T
typedef enum {
    SPI_MODE_0 = SPI_MODE_SEL(0, 0),    
    SPI_MODE_1 = SPI_MODE_SEL(0, 1),    
    SPI_MODE_2 = SPI_MODE_SEL(1, 0),    
    SPI_MODE_3 = SPI_MODE_SEL(1, 1)     
} spi_mode_t;

#define SPI_CLK_SEL(s2x, pr1, pr0)    ((s2x << 2) | (pr1 << 1) | pr0)

#define HAVE_SPI_CLK_T
typedef enum {
    SPI_CLK_100KHZ = SPI_CLK_SEL(0, 1, 1),      
    SPI_CLK_400KHZ = SPI_CLK_SEL(1, 1, 0),      
    SPI_CLK_1MHZ   = SPI_CLK_SEL(0, 0, 1),      
    SPI_CLK_5MHZ   = SPI_CLK_SEL(0, 0, 0),      
    SPI_CLK_10MHZ  = SPI_CLK_SEL(1, 0, 0)       
} spi_clk_t;
#endif /* ifndef DOXYGEN */

typedef enum {
    TIMER_DIV1_8_64_128_1024 = 0x549,           
    TIMER_DIV1_8_32_64_128_256_1024 = 0x5E9,    
} timer_div_t;


typedef struct {
    mini_timer_t *dev;                  
    gpio_t pin_ch[2];                   
    timer_div_t div;                    
} pwm_conf_t;


#define PERIPH_TIMER_PROVIDES_SET

#define EEPROM_CLEAR_BYTE              (0xff)

#define NWDT_TIME_LOWER_LIMIT           (1)
#define NWDT_TIME_UPPER_LIMIT           (8192U)

#define WDT_HAS_STOP                    (1)

#if defined(SCCR0) && !defined(RTT_BACKEND_SC)
#define RTT_BACKEND_SC   (1)
#endif
 
#if RTT_BACKEND_SC
/* For MCU with MAC symbol counter */
#ifndef RTT_MAX_VALUE
#define RTT_MAX_VALUE    (0xFFFFFFFFUL)  /* 32-bit timer */
#endif
 
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY    (62500UL)       /* in Hz. */
#endif
 
#else
/* For MCU without MAC symbol counter */
#ifndef RTT_MAX_VALUE
#define RTT_MAX_VALUE    (0x00FFFFFF)    /* 24-bit timer */
#endif
/* possible values: 32, 128, 256, 512, 1024, 4096, 32768 */
#ifndef RTT_FREQUENCY
#define RTT_FREQUENCY    (1024U)         /* in Hz. */
#endif
#endif
 
#ifdef __cplusplus
}
#endif