Main header for STM32MP1 clock configuration. More...
Main header for STM32MP1 clock configuration.
Definition in file cfg_clock_default.h.
Go to the source code of this file.
MP1 clock PLL settings (208MHz) | |
#define | CONFIG_CLOCK_PLL_M (2) |
#define | CONFIG_CLOCK_PLL_N (78) |
#define | CONFIG_CLOCK_PLL_P (3) |
#define | CONFIG_CLOCK_PLL_Q (13) |
#define | CONFIG_CLOCK_PLL_R (3) |
MP1 clock bus settings (MCU, APB1, APB2 and APB3) | |
#define | CONFIG_CLOCK_MCU_DIV (1) /* max 208MHz */ |
#define | CONFIG_CLOCK_APB1_DIV (2) /* max 104MHz */ |
#define | CONFIG_CLOCK_APB2_DIV (2) /* max 104MHz */ |
#define | CONFIG_CLOCK_APB3_DIV (2) /* max 104MHz */ |
MP1 clock values | |
#define | CLOCK_PLL_SRC (CONFIG_CLOCK_HSI) |
#define | CLOCK_PLLQ |
#define | CLOCK_APB1 |
#define | CLOCK_APB2 |
#define CLOCK_APB1 |
Definition at line 103 of file cfg_clock_default.h.
#define CLOCK_APB2 |
Definition at line 105 of file cfg_clock_default.h.
#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSI) |
Definition at line 83 of file cfg_clock_default.h.
#define CLOCK_PLLQ |
Definition at line 100 of file cfg_clock_default.h.
#define CONFIG_CLOCK_APB1_DIV (2) /* max 104MHz */ |
Definition at line 62 of file cfg_clock_default.h.
#define CONFIG_CLOCK_APB2_DIV (2) /* max 104MHz */ |
Definition at line 65 of file cfg_clock_default.h.
#define CONFIG_CLOCK_APB3_DIV (2) /* max 104MHz */ |
Definition at line 68 of file cfg_clock_default.h.
#define CONFIG_CLOCK_MCU_DIV (1) /* max 208MHz */ |
Definition at line 59 of file cfg_clock_default.h.
#define CONFIG_CLOCK_PLL_M (2) |
Definition at line 32 of file cfg_clock_default.h.
#define CONFIG_CLOCK_PLL_N (78) |
Definition at line 40 of file cfg_clock_default.h.
#define CONFIG_CLOCK_PLL_P (3) |
Definition at line 44 of file cfg_clock_default.h.
#define CONFIG_CLOCK_PLL_Q (13) |
Definition at line 47 of file cfg_clock_default.h.
#define CONFIG_CLOCK_PLL_R (3) |
Definition at line 50 of file cfg_clock_default.h.