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cfg_clock_default.h
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1/*
2 * Copyright (C) 2020 Savoir-faire Linux
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser General
5 * Public License v2.1. See the file LICENSE in the top level directory for more
6 * details.
7 */
8
9#pragma once
10
20
22#include "kernel_defines.h"
23#include "macros/units.h"
24
29/* The following parameters configure a 208MHz system clock with HSE (24MHz)
30 * or HSI (16MHz) as PLL input clock */
31#ifndef CONFIG_CLOCK_PLL_M
32#define CONFIG_CLOCK_PLL_M (2)
33#endif
34#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CONFIG_CLOCK_HSE == MHZ(24))
35#ifndef CONFIG_CLOCK_PLL_N
36#define CONFIG_CLOCK_PLL_N (52)
37#endif
38#else /* HSI */
39#ifndef CONFIG_CLOCK_PLL_N
40#define CONFIG_CLOCK_PLL_N (78)
41#endif
42#endif
43#ifndef CONFIG_CLOCK_PLL_P
44#define CONFIG_CLOCK_PLL_P (3)
45#endif
46#ifndef CONFIG_CLOCK_PLL_Q
47#define CONFIG_CLOCK_PLL_Q (13)
48#endif
49#ifndef CONFIG_CLOCK_PLL_R
50#define CONFIG_CLOCK_PLL_R (3)
51#endif
53
58#ifndef CONFIG_CLOCK_MCU_DIV
59#define CONFIG_CLOCK_MCU_DIV (1) /* max 208MHz */
60#endif
61#ifndef CONFIG_CLOCK_APB1_DIV
62#define CONFIG_CLOCK_APB1_DIV (2) /* max 104MHz */
63#endif
64#ifndef CONFIG_CLOCK_APB2_DIV
65#define CONFIG_CLOCK_APB2_DIV (2) /* max 104MHz */
66#endif
67#ifndef CONFIG_CLOCK_APB3_DIV
68#define CONFIG_CLOCK_APB3_DIV (2) /* max 104MHz */
69#endif
71
72#if CLOCK_CORECLOCK > MHZ(208)
73#error "SYSCLK cannot exceed 208MHz"
74#endif
75
80#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE)
81#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSE)
82#else /* CONFIG_CLOCK_HSI */
83#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSI)
84#endif
85
86#if IS_ACTIVE(CONFIG_USE_CLOCK_HSI)
87#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSI)
88
89#elif IS_ACTIVE(CONFIG_USE_CLOCK_HSE)
90#if !IS_ACTIVE(CONFIG_BOARD_HAS_HSE)
91#error "The board doesn't provide an HSE oscillator"
92#endif
93#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSE)
94
95#elif IS_ACTIVE(CONFIG_USE_CLOCK_PLL)
96#define CLOCK_CORECLOCK (((CLOCK_PLL_SRC / CONFIG_CLOCK_PLL_M) \
97 * CONFIG_CLOCK_PLL_N) / CONFIG_CLOCK_PLL_P)
98#endif /* CONFIG_USE_CLOCK_PLL */
99
100#define CLOCK_PLLQ (((CLOCK_PLL_SRC / CONFIG_CLOCK_PLL_M) \
101 * CONFIG_CLOCK_PLL_N) / CONFIG_CLOCK_PLL_Q)
102
103#define CLOCK_APB1 (CLOCK_CORECLOCK \
104 / CONFIG_CLOCK_APB1_DIV)
105#define CLOCK_APB2 (CLOCK_CORECLOCK \
106 / CONFIG_CLOCK_APB2_DIV)
108
109#ifdef __cplusplus
110extern "C" {
111#endif
112
113#ifdef __cplusplus
114}
115#endif
116
Base STM32Fx/Gx/MP1/C0 clock configuration.
Common macros and compiler attributes/pragmas configuration.
Unit helper macros.