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cpu_i2c.h
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1/*
2 * Copyright (C) 2016 Freie Universität Berlin
3 * 2017 OTA keys S.A.
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
10#pragma once
11
22
23#include <stdint.h>
24
25#include "cpu.h"
26#include "periph/cpu_gpio.h"
27
28#ifdef __cplusplus
29extern "C" {
30#endif
31
37#define PERIPH_I2C_NEED_READ_REG
39#define PERIPH_I2C_NEED_WRITE_REG
41#define PERIPH_I2C_NEED_READ_REGS
42#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
43 defined(CPU_FAM_STM32L1) || defined(CPU_FAM_STM32F4) || \
44 defined(CPU_FAM_STM32MP1)
46#define PERIPH_I2C_NEED_WRITE_REGS
47#endif
49
50#ifndef DOXYGEN
55#define HAVE_I2C_SPEED_T
56typedef enum {
57#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
58 defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L1) || \
59 defined(CPU_FAM_STM32MP1)
61#endif
64#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
65 defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \
66 defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB) || \
67 defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32G0) || \
68 defined(CPU_FAM_STM32L5) || defined(CPU_FAM_STM32U5) || \
69 defined(CPU_FAM_STM32WL) || defined(CPU_FAM_STM32C0)
71#endif
74#endif /* ndef DOXYGEN */
75
79typedef struct {
80 I2C_TypeDef *dev;
81 i2c_speed_t speed;
82 gpio_t scl_pin;
83 gpio_t sda_pin;
84#ifndef CPU_FAM_STM32F1
87#endif
88 uint8_t bus;
89 uint32_t rcc_mask;
90#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
91 defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32G0) || \
92 defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32L4) || \
93 defined(CPU_FAM_STM32L5) || defined(CPU_FAM_STM32WB) || \
94 defined(CPU_FAM_STM32U5) || defined(CPU_FAM_STM32WL) || \
95 defined(CPU_FAM_STM32C0)
96 uint32_t rcc_sw_mask;
97#endif
98#if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
99 defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L1) || \
100 defined(CPU_FAM_STM32MP1)
101 uint32_t clk;
102#endif
103 uint8_t irqn;
104} i2c_conf_t;
105
106#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
107 defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \
108 defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32L5) || \
109 defined(CPU_FAM_STM32G0) || defined(CPU_FAM_STM32G4) || \
110 defined(CPU_FAM_STM32U5) || defined(CPU_FAM_STM32WB) || \
111 defined(CPU_FAM_STM32WL) || defined(CPU_FAM_STM32C0)
115typedef struct {
116 uint8_t presc;
117 uint8_t scll;
118 uint8_t sclh;
119 uint8_t sdadel;
120 uint8_t scldel;
121} i2c_timing_param_t;
122
136static const i2c_timing_param_t timing_params[] = {
137 [ I2C_SPEED_NORMAL ] = {
138 .presc = 3,
139 .scll = 0x13, /* t_SCLL = 5.0us */
140 .sclh = 0xF, /* t_SCLH = 4.0us */
141 .sdadel = 0x2, /* t_SDADEL = 500ns */
142 .scldel = 0x4, /* t_SCLDEL = 1250ns */
143 },
144 [ I2C_SPEED_FAST ] = {
145 .presc = 1,
146 .scll = 0x9, /* t_SCLL = 1250ns */
147 .sclh = 0x3, /* t_SCLH = 500ns */
148 .sdadel = 0x2, /* t_SDADEL = 250ns */
149 .scldel = 0x3, /* t_SCLDEL = 500ns */
150 },
151 [ I2C_SPEED_FAST_PLUS ] = {
152 .presc = 0,
153 .scll = 0x4, /* t_SCLL = 312.5ns */
154 .sclh = 0x2, /* t_SCLH = 187.5ns */
155 .sdadel = 0x0, /* t_SDADEL = 0ns */
156 .scldel = 0x2, /* t_SCLDEL = 187.5ns */
157 }
158};
159#endif /* CPU_FAM_STM32F0 || CPU_FAM_STM32F3 || CPU_FAM_STM32F7 ||
160 CPU_FAM_STM32L0 || CPU_FAM_STM32L4 || CPU_FAM_STM32L5 ||
161 CPU_FAM_STM32G0 || CPU_FAM_STM32G4 || CPU_FAM_STM32U5 ||
162 CPU_FAM_STM32WB || CPU_FAM_STM32WL || CPU_FAM_STM32C0 */
163
164#if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
165 defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32G0) || \
166 defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32L0) || \
167 defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32L5) || \
168 defined(CPU_FAM_STM32U5) || defined(CPU_FAM_STM32WB) || \
169 defined(CPU_FAM_STM32WL) || defined(CPU_FAM_STM32C0)
174#define PERIPH_I2C_MAX_BYTES_PER_FRAME (256U)
175#endif
176
177#ifdef __cplusplus
178}
179#endif
180
i2c_speed_t
Definition periph_cpu.h:275
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:277
@ I2C_SPEED_FAST_PLUS
fast plus mode: ~1000 kbit/s
Definition periph_cpu.h:279
@ I2C_SPEED_LOW
low speed mode: ~10 kbit/s
Definition periph_cpu.h:276
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition periph_cpu.h:278
GPIO CPU definitions for the STM32 family.
gpio_af_t
Override alternative GPIO mode options.
Definition periph_cpu.h:165
I2C configuration structure.
Definition periph_cpu.h:298
gpio_af_t scl_af
scl pin alternate function value
Definition cpu_i2c.h:85
gpio_af_t sda_af
sda pin alternate function value
Definition cpu_i2c.h:86
IRQn_Type irqn
I2C event interrupt number.
Definition periph_cpu.h:462
uint8_t bus
APB bus.
Definition cpu_i2c.h:88
uint32_t rcc_mask
bit in clock enable register
Definition cpu_i2c.h:89