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periph_cpu_common.h
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1/*
2 * Copyright (C) 2025 Mesotic SAS
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
9#pragma once
10
21
22#include "cpu.h"
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28#ifndef DOXYGEN
29#define HAVE_GPIO_T
30typedef uint32_t gpio_t;
31
32#define GPIO_UNDEF (0xffffffff)
33
34#define GPIO_PIN(x, y) (((uint32_t)PIOA + (x << 9)) | y)
35#endif /* DOXYGEN */
36
45#define TIMER_CHANNEL_NUMOF (1)
46
55#define GPIO_MODE(io, pu, od) (io | (pu << 1) | (od << 2))
56
57#ifndef DOXYGEN
58#define HAVE_GPIO_MODE_T
59typedef enum {
60 GPIO_IN = GPIO_MODE(0, 0, 0),
61 GPIO_IN_PD = 0xf,
62 GPIO_IN_PU = GPIO_MODE(0, 1, 0),
63 GPIO_OUT = GPIO_MODE(1, 0, 0),
64 GPIO_OD = GPIO_MODE(1, 0, 1),
65 GPIO_OD_PU = GPIO_MODE(1, 1, 1),
67
68#define HAVE_GPIO_FLANK_T
69typedef enum {
70 GPIO_RISING = 1,
71 GPIO_FALLING = 2,
72 GPIO_BOTH = 3
74#endif /* ndef DOXYGEN */
75
79typedef enum {
82#ifdef CPU_FAM_SAM4S
83 GPIO_MUX_C = 2,
84 GPIO_MUX_D = 3,
85#endif
87
91enum {
92 PA = 0,
93 PB = 1,
94 PC = 2,
95#ifdef CPU_FAM_SAM3
96 PD = 3,
97#endif
98};
99
106void gpio_init_mux(gpio_t pin, gpio_mux_t mux);
107
111typedef struct {
112 Tc *dev;
113 uint8_t id_ch0;
115
119typedef struct {
120 Uart *dev;
121 gpio_t rx_pin;
122 gpio_t tx_pin;
124 uint8_t pmc_id;
125 uint8_t irqn;
127
128#ifdef __cplusplus
129}
130#endif
131
gpio_flank_t
Definition periph_cpu.h:179
@ GPIO_OUT
select GPIO MASK as output
Definition periph_cpu.h:164
@ GPIO_IN
select GPIO MASK as input
Definition periph_cpu.h:163
gpio_mode_t
Available pin modes.
Definition periph_cpu.h:91
#define GPIO_MODE(oe, ic, pr, dr)
Generate GPIO mode bitfields.
void gpio_init_mux(gpio_t pin, gpio_mux_t mux)
Set up alternate function (PMUX setting) for a PORT pin.
@ PB
port B
@ PC
port C
@ PA
port A
@ PD
port D
gpio_mux_t
Available MUX values for configuring a pin's alternate function.
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ GPIO_MUX_A
select peripheral function A
@ GPIO_MUX_B
select peripheral function B
Timer device configuration.
Definition periph_cpu.h:263
uint8_t id_ch0
ID of the timer's first channel.
TC0_t * dev
Pointer to the used as Timer device.
Definition periph_cpu.h:264
UART device configuration.
Definition periph_cpu.h:217
USART_t * dev
pointer to the used UART device
Definition periph_cpu.h:218
gpio_mux_t mux
alternative function for pins
uint8_t irqn
IRQ channel.
Definition periph_cpu.h:335
gpio_t tx_pin
pin used for TX
Definition periph_cpu.h:221
uint8_t pmc_id
bit in the PMC register of the device
gpio_t rx_pin
pin used for RX
Definition periph_cpu.h:220