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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2021 Gerson Fernando Budke
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
17#include "mutex.h"
18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
23#include <stdint.h>
24#include <avr/io.h>
25
26#include "periph_cpu.h"
27
32static const timer_conf_t timer_config[] = {
33 {
34 .dev = (void *)&TCC1,
35 .pwr = PWR_RED_REG(PWR_PORT_C, PR_TC1_bm),
36 .type = TC_TYPE_1,
37 .int_lvl = { CPU_INT_LVL_LOW,
41 },
42 {
43 .dev = (void *)&TCC0,
44 .pwr = PWR_RED_REG(PWR_PORT_C, PR_TC0_bm),
45 .type = TC_TYPE_0,
46 .int_lvl = { CPU_INT_LVL_LOW,
50 }
51};
52
53#define TIMER_0_ISRA TCC1_CCA_vect
54
55#define TIMER_1_ISRA TCC0_CCA_vect
56#define TIMER_1_ISRB TCC0_CCB_vect
57#define TIMER_1_ISRC TCC0_CCC_vect
58#define TIMER_1_ISRD TCC0_CCD_vect
59
60#define TIMER_NUMOF ARRAY_SIZE(timer_config)
62
67static const uart_conf_t uart_config[] = {
68 { /* J1 */
69 .dev = &USARTC0,
70 .pwr = PWR_RED_REG(PWR_PORT_C, PR_USART0_bm),
71 .rx_pin = GPIO_PIN(PORT_C, 2),
72 .tx_pin = GPIO_PIN(PORT_C, 3),
73#ifdef MODULE_PERIPH_UART_HW_FC
74 .rts_pin = GPIO_UNDEF,
75 .cts_pin = GPIO_UNDEF,
76#endif
77 .rx_int_lvl = CPU_INT_LVL_LOW,
78 .tx_int_lvl = CPU_INT_LVL_LOW,
79 .dre_int_lvl = CPU_INT_LVL_OFF,
80 },
81 { /* J4 */
82 .dev = &USARTE0,
83 .pwr = PWR_RED_REG(PWR_PORT_E, PR_USART0_bm),
84 .rx_pin = GPIO_PIN(PORT_E, 2),
85 .tx_pin = GPIO_PIN(PORT_E, 3),
86#ifdef MODULE_PERIPH_UART_HW_FC
87 .rts_pin = GPIO_UNDEF,
88 .cts_pin = GPIO_UNDEF,
89#endif
90 .rx_int_lvl = CPU_INT_LVL_LOW,
91 .tx_int_lvl = CPU_INT_LVL_LOW,
92 .dre_int_lvl = CPU_INT_LVL_OFF,
93 },
94};
95
96/* interrupt function name mapping */
97#define UART_0_RXC_ISR USARTC0_RXC_vect /* Reception Complete Interrupt */
98#define UART_0_DRE_ISR USARTC0_DRE_vect /* Data Register Empty Interrupt */
99#define UART_0_TXC_ISR USARTC0_TXC_vect /* Transmission Complete Interrupt */
100
101#define UART_1_RXC_ISR USARTE0_RXC_vect
102#define UART_1_DRE_ISR USARTE0_DRE_vect
103#define UART_1_TXC_ISR USARTE0_TXC_vect
104
105#define UART_NUMOF ARRAY_SIZE(uart_config)
107
112static const i2c_conf_t i2c_config[] = {
113 { /* J1 */
114 .dev = &TWIC,
115 .pwr = PWR_RED_REG(PWR_PORT_C, PR_TWI_bm),
116 .sda_pin = GPIO_PIN(PORT_C, 0),
117 .scl_pin = GPIO_PIN(PORT_C, 1),
118 .speed = I2C_SPEED_NORMAL,
119 .int_lvl = CPU_INT_LVL_LOW,
120 },
121};
122
123#define I2C_0_ISR TWIC_TWIM_vect
124
125#define I2C_NUMOF ARRAY_SIZE(i2c_config)
127
132static const spi_conf_t spi_config[] = {
133 {
134 .dev = &SPIC,
135 .pwr = PWR_RED_REG(PWR_PORT_C, PR_SPI_bm),
136 .sck_pin = GPIO_PIN(PORT_C, 7),
137 .miso_pin = GPIO_PIN(PORT_C, 6),
138 .mosi_pin = GPIO_PIN(PORT_C, 5),
139 .ss_pin = GPIO_PIN(PORT_C, 4),
140 },
141};
142
143#define SPI_NUMOF ARRAY_SIZE(spi_config)
145
146#ifdef __cplusplus
147}
148#endif
149
150#include "periph_conf_common.h"
151
@ PORT_C
port C
Definition periph_cpu.h:45
@ PORT_E
port E
Definition periph_cpu.h:47
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
#define PWR_RED_REG(reg, dev)
Define a CPU specific Power Reduction index macro.
Definition periph_cpu.h:75
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:274
@ CPU_INT_LVL_OFF
Interrupt Disabled.
Definition periph_cpu.h:36
@ CPU_INT_LVL_LOW
Interrupt Low Level.
Definition periph_cpu.h:37
Mutex for thread synchronization.
I2C configuration structure.
Definition periph_cpu.h:295
SPI device configuration.
Definition periph_cpu.h:333
Timer device configuration.
Definition periph_cpu.h:260
UART device configuration.
Definition periph_cpu.h:214