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periph_conf.h
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1/*
2 * Copyright (C) 2016 Freie Universität Berlin
3 * 2016 Inria
4 *
5 * This file is subject to the terms and conditions of the GNU Lesser
6 * General Public License v2.1. See the file LICENSE in the top level
7 * directory for more details.
8 */
9
10#pragma once
11
25
26#include <stdint.h>
27
28#include "cpu.h"
29#include "periph_cpu.h"
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
66#define CLOCK_USE_PLL (1)
67
68#if CLOCK_USE_PLL
69/* edit these values to adjust the PLL output frequency */
70#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
71#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
72/* generate the actual used core clock frequency */
73#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
74#else
75/* edit this value to your needs */
76#define CLOCK_DIV (1U)
77/* generate the actual core clock frequency */
78#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
79#endif
81
86static const tc32_conf_t timer_config[] = {
87 { /* Timer 0 - System Clock */
88 .dev = TC3,
89 .irq = TC3_IRQn,
90 .pm_mask = PM_APBCMASK_TC3,
91 .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
92#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
93 .gclk_src = SAM0_GCLK_1MHZ,
94#else
95 .gclk_src = SAM0_GCLK_MAIN,
96#endif
97 .flags = TC_CTRLA_MODE_COUNT16,
98 },
99 { /* Timer 1 */
100 .dev = TC4,
101 .irq = TC4_IRQn,
102 .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
103 .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
104#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
105 .gclk_src = SAM0_GCLK_1MHZ,
106#else
107 .gclk_src = SAM0_GCLK_MAIN,
108#endif
109 .flags = TC_CTRLA_MODE_COUNT32,
110 }
111};
112
113#define TIMER_0_MAX_VALUE 0xffff
114
115/* interrupt function name mapping */
116#define TIMER_0_ISR isr_tc3
117#define TIMER_1_ISR isr_tc4
118
119#define TIMER_NUMOF ARRAY_SIZE(timer_config)
121
126static const uart_conf_t uart_config[] = {
127 {
128 .dev = &SERCOM5->USART,
129 .rx_pin = GPIO_PIN(PB,23),
130 .tx_pin = GPIO_PIN(PB,22),
131#ifdef MODULE_PERIPH_UART_HW_FC
132 .rts_pin = GPIO_UNDEF,
133 .cts_pin = GPIO_UNDEF,
134#endif
135 .mux = GPIO_MUX_D,
136 .rx_pad = UART_PAD_RX_3,
137 .tx_pad = UART_PAD_TX_2,
138 .flags = UART_FLAG_NONE,
139 .gclk_src = SAM0_GCLK_MAIN,
140 },
141 {
142 .dev = &SERCOM0->USART,
143 .rx_pin = GPIO_PIN(PA,11),
144 .tx_pin = GPIO_PIN(PA,10),
145#ifdef MODULE_PERIPH_UART_HW_FC
146 .rts_pin = GPIO_UNDEF,
147 .cts_pin = GPIO_UNDEF,
148#endif
149 .mux = GPIO_MUX_C,
150 .rx_pad = UART_PAD_RX_3,
151 .tx_pad = UART_PAD_TX_2,
152 .flags = UART_FLAG_NONE,
153 .gclk_src = SAM0_GCLK_MAIN,
154 }
155};
156
157/* interrupt function name mapping */
158#define UART_0_ISR isr_sercom5
159#define UART_1_ISR isr_sercom0
160
161#define UART_NUMOF ARRAY_SIZE(uart_config)
163
168#define PWM_0_EN 1
169#define PWM_1_EN 1
170
171#if PWM_0_EN
172/* PWM0 channels */
173static const pwm_conf_chan_t pwm_chan0_config[] = {
174 /* GPIO pin, MUX value, TCC channel */
175 { GPIO_PIN(PA, 8), GPIO_MUX_E, 0 },
176 { GPIO_PIN(PA, 9), GPIO_MUX_E, 1 },
177};
178#endif
179#if PWM_1_EN
180/* PWM1 channels */
181static const pwm_conf_chan_t pwm_chan1_config[] = {
182 /* GPIO pin, MUX value, TCC channel */
183 { GPIO_PIN(PA, 6), GPIO_MUX_E, 0 },
184 { GPIO_PIN(PA, 7), GPIO_MUX_E, 1 },
185};
186#endif
187
188/* PWM device configuration */
189static const pwm_conf_t pwm_config[] = {
190#if PWM_0_EN
191 {TCC_CONFIG(TCC0), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
192#endif
193#if PWM_1_EN
194 {TCC_CONFIG(TCC1), pwm_chan1_config, ARRAY_SIZE(pwm_chan1_config), SAM0_GCLK_MAIN},
195#endif
196};
197
198/* number of devices that are actually defined */
199#define PWM_NUMOF ARRAY_SIZE(pwm_config)
201
206
207/* ADC Default values */
208#define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
209
210#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
211#define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
212#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
213
214static const adc_conf_chan_t adc_channels[] = {
215 /* port, pin, muxpos */
216 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }, /* A0 */
217 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB08 }, /* A1 */
218 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB09 }, /* A2 */
219 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA04 }, /* A3 */
220 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA05 }, /* A4 */
221 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB02 }, /* A5 */
222};
223
224#define ADC_NUMOF ARRAY_SIZE(adc_channels)
226
231static const spi_conf_t spi_config[] = {
232 {
233 .dev = &SERCOM4->SPI,
234 .miso_pin = GPIO_PIN(PA, 12),
235 .mosi_pin = GPIO_PIN(PB, 10),
236 .clk_pin = GPIO_PIN(PB, 11),
237 .miso_mux = GPIO_MUX_D,
238 .mosi_mux = GPIO_MUX_D,
239 .clk_mux = GPIO_MUX_D,
240 .miso_pad = SPI_PAD_MISO_0,
241 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
242 .gclk_src = SAM0_GCLK_MAIN,
243 },
244 {
245 .dev = &SERCOM1->SPI,
246 .miso_pin = GPIO_PIN(PA, 19),
247 .mosi_pin = GPIO_PIN(PA, 16),
248 .clk_pin = GPIO_PIN(PA, 17),
249 .miso_mux = GPIO_MUX_C,
250 .mosi_mux = GPIO_MUX_C,
251 .clk_mux = GPIO_MUX_C,
252 .miso_pad = SPI_PAD_MISO_3,
253 .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
254 .gclk_src = SAM0_GCLK_MAIN,
255 }
256};
257
258#define SPI_NUMOF ARRAY_SIZE(spi_config)
260
265
266static const i2c_conf_t i2c_config[] = {
267 {
268 .dev = &(SERCOM3->I2CM),
269 .speed = I2C_SPEED_FAST,
270 .scl_pin = GPIO_PIN(PA, 23),
271 .sda_pin = GPIO_PIN(PA, 22),
272 .mux = GPIO_MUX_C,
273 .gclk_src = SAM0_GCLK_MAIN,
274 .flags = I2C_FLAG_NONE
275 }
276};
277
278#define I2C_NUMOF ARRAY_SIZE(i2c_config)
280
285#ifndef RTT_FREQUENCY
286#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
287#endif
288#define RTT_MIN_OFFSET (10U)
290
295static const sam0_common_usb_config_t sam_usbdev_config[] = {
296 {
297 .dm = GPIO_PIN(PA, 24),
298 .dp = GPIO_PIN(PA, 25),
299 .d_mux = GPIO_MUX_G,
300 .device = &USB->DEVICE,
301 .gclk_src = SAM0_GCLK_MAIN,
302 }
303};
305
306#ifdef __cplusplus
307}
308#endif
309
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition periph_cpu.h:278
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition container.h:82
@ UART_PAD_RX_3
select pad 3
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ SPI_PAD_MISO_3
use pad 3 for MISO line
@ UART_FLAG_NONE
No flags set.
@ PB
port B
@ PA
port A
@ UART_PAD_TX_2
select pad 2
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA05
Alias for PIN5.
Definition periph_cpu.h:123
#define ADC_INPUTCTRL_MUXPOS_PB08
Alias for PIN2.
Definition periph_cpu.h:120
#define ADC_INPUTCTRL_MUXPOS_PB02
Alias for PIN10.
Definition periph_cpu.h:128
#define ADC_INPUTCTRL_MUXPOS_PB09
Alias for PIN3.
Definition periph_cpu.h:121
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition periph_cpu.h:75
#define ADC_INPUTCTRL_MUXPOS_PA04
Alias for PIN4.
Definition periph_cpu.h:122
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition periph_cpu.h:118
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition periph_cpu.h:298
PWM channel configuration data structure.
PWM device configuration.
USB peripheral parameters.
SPI device configuration.
Definition periph_cpu.h:336
Timer device configuration.
UART device configuration.
Definition periph_cpu.h:217