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periph_conf.h
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1/*
2 * Copyright (C) 2019 Mesotic SAS
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
9#pragma once
10
21
22#include "periph_cpu.h"
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
31#define CLOCK_CORECLOCK (16000000U)
32
37#define USE_VREG_BUCK (1)
38
43static const tc32_conf_t timer_config[] = {
44 { /* Timer 0 - System Clock */
45 .dev = TC0,
46 .irq = TC0_IRQn,
47 .mclk = &MCLK->APBCMASK.reg,
48 .mclk_mask = MCLK_APBCMASK_TC0_Msk | MCLK_APBCMASK_TC1_Msk,
49 .gclk_id = TC0_GCLK_ID,
50 .gclk_src = SAM0_GCLK_MAIN,
51 .flags = TC_CTRLA_MODE_COUNT32,
52 },
53 {
54 .dev = TC2,
55 .irq = TC2_IRQn,
56 .mclk = &MCLK->APBCMASK.reg,
57 .mclk_mask = MCLK_APBCMASK_TC2_Msk,
58 .gclk_id = TC2_GCLK_ID,
59 .gclk_src = SAM0_GCLK_MAIN,
60 .flags = TC_CTRLA_MODE_COUNT16,
61 }
62};
63
64/* Timer 0 configuration */
65#define TIMER_0_CHANNELS 2
66#define TIMER_0_ISR isr_tc0
67
68/* Timer 1 configuration */
69#define TIMER_1_CHANNELS 2
70#define TIMER_1_ISR isr_tc2
71#define TIMER_1_MAX_VALUE 0xffff
72
73#define TIMER_NUMOF ARRAY_SIZE(timer_config)
75
80static const uart_conf_t uart_config[] = {
81 { /* Virtual COM Port */
82 .dev = &SERCOM2->USART,
83 .rx_pin = GPIO_PIN(PA, 25),
84 .tx_pin = GPIO_PIN(PA, 24),
85#ifdef MODULE_PERIPH_UART_HW_FC
86 .rts_pin = GPIO_UNDEF,
87 .cts_pin = GPIO_UNDEF,
88#endif
89 .mux = GPIO_MUX_D,
90 .rx_pad = UART_PAD_RX_3,
91 .tx_pad = UART_PAD_TX_2,
92 .flags = UART_FLAG_NONE,
93 .gclk_src = SAM0_GCLK_MAIN,
94 },
95 { /* EXT1 */
96 /* For SAML11, see boards/saml11/doc.txt
97 * to properly enable this SERCOM */
98 .dev = &SERCOM1->USART,
99 .rx_pin = GPIO_PIN(PA, 9),
100 .tx_pin = GPIO_PIN(PA, 8),
101#ifdef MODULE_PERIPH_UART_HW_FC
102 .rts_pin = GPIO_UNDEF,
103 .cts_pin = GPIO_UNDEF,
104#endif
105 .mux = GPIO_MUX_C,
106 .rx_pad = UART_PAD_RX_1,
107 .tx_pad = UART_PAD_TX_0,
108 .flags = UART_FLAG_NONE,
109 .gclk_src = SAM0_GCLK_MAIN,
110 }
111};
112
113/* interrupt function name mapping */
114#define UART_0_ISR isr_sercom2_2
115#define UART_0_ISR_TX isr_sercom2_0
116#define UART_1_ISR isr_sercom1_2
117#define UART_1_ISR_TX isr_sercom1_0
118
119#define UART_NUMOF ARRAY_SIZE(uart_config)
121
126#define PWM_0_EN 1
127#define PWM_1_EN 0
128
129#if PWM_0_EN
130/* PWM0 channels */
131static const pwm_conf_chan_t pwm_chan0_config[] = {
132 /* GPIO pin, MUX value, TC channel */
133 { GPIO_PIN(PA, 18), GPIO_MUX_E, 0 },
134 { GPIO_PIN(PA, 19), GPIO_MUX_E, 1 },
135};
136#endif
137#if PWM_1_EN
138/* PWM1 channels */
139static const pwm_conf_chan_t pwm_chan1_config[] = {
140 /* GPIO pin, MUX value, TC channel */
141 { GPIO_PIN(PA, 7), GPIO_MUX_E, 1 }, /* LED */
142};
143#endif
144
145/* PWM device configuration */
146static const pwm_conf_t pwm_config[] = {
147#if PWM_0_EN
148 { .tim = TC_CONFIG(TC2),
149 .chan = pwm_chan0_config,
150 .chan_numof = ARRAY_SIZE(pwm_chan0_config),
151 .gclk_src = SAM0_GCLK_MAIN,
152 },
153#endif
154#if PWM_1_EN
155 /* conflicts with xtimer config (TC0_TC1) */
156 { .tim = TC_CONFIG(TC1),
157 .chan = pwm_chan1_config,
158 .chan_numof = ARRAY_SIZE(pwm_chan0_config),
159 .gclk_src = SAM0_GCLK_MAIN,
160 },
161#endif
162};
163
164/* number of devices that are actually defined */
165#define PWM_NUMOF ARRAY_SIZE(pwm_config)
167
172static const spi_conf_t spi_config[] = {
173 {
174 .dev = &(SERCOM0->SPI),
175 .miso_pin = GPIO_PIN(PA, 4),
176 .mosi_pin = GPIO_PIN(PA, 14),
177 .clk_pin = GPIO_PIN(PA, 15),
178 .miso_mux = GPIO_MUX_D,
179 .mosi_mux = GPIO_MUX_D,
180 .clk_mux = GPIO_MUX_D,
181 .miso_pad = SPI_PAD_MISO_0,
182 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
183 .gclk_src = SAM0_GCLK_MAIN,
184#ifdef MODULE_PERIPH_DMA
185 .tx_trigger = SERCOM0_DMAC_ID_TX,
186 .rx_trigger = SERCOM0_DMAC_ID_RX,
187#endif
188 }
189};
190
191#define SPI_NUMOF ARRAY_SIZE(spi_config)
193
198static const i2c_conf_t i2c_config[] = {
199 {
200 .dev = &(SERCOM1->I2CM),
201 .speed = I2C_SPEED_NORMAL,
202 .scl_pin = GPIO_PIN(PA, 17),
203 .sda_pin = GPIO_PIN(PA, 16),
204 .mux = GPIO_MUX_C,
205 .gclk_src = SAM0_GCLK_MAIN,
206 .flags = I2C_FLAG_NONE
207 }
208};
209
210#define I2C_NUMOF ARRAY_SIZE(i2c_config)
212
217#define EXTERNAL_OSC32_SOURCE 1
218#define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
220
225#ifndef RTT_FREQUENCY
226#define RTT_FREQUENCY (32768U)
227#endif
229
234
235/* ADC Default values */
236#define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV256
237
238#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
239#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
240
241static const adc_conf_chan_t adc_channels[] = {
242 /* port, pin, muxpos */
243 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA10 },
244};
245
246#define ADC_NUMOF ARRAY_SIZE(adc_channels)
248
253#define DAC_CLOCK SAM0_GCLK_32KHZ
254 /* use Vcc as reference voltage */
255#define DAC_VREF DAC_CTRLB_REFSEL_AVCC
257
258#ifdef __cplusplus
259}
260#endif
261
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:277
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition container.h:82
@ UART_PAD_RX_1
select pad 1
@ UART_PAD_RX_3
select pad 3
@ I2C_FLAG_NONE
No flags set.
#define TC_CONFIG(tim)
Static initializer for TC timer configuration.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ UART_FLAG_NONE
No flags set.
@ PA
port A
@ UART_PAD_TX_0
select pad 0
@ UART_PAD_TX_2
select pad 2
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA10
Alias for PIN18.
Definition periph_cpu.h:136
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition periph_cpu.h:298
PWM channel configuration data structure.
PWM device configuration.
SPI device configuration.
Definition periph_cpu.h:336
Timer device configuration.
UART device configuration.
Definition periph_cpu.h:217