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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2017 Inria
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
17
18#include <stdint.h>
19
20#include "cpu.h"
21#include "periph_cpu.h"
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
58#define CLOCK_USE_PLL (1)
59
60#if CLOCK_USE_PLL
61/* edit these values to adjust the PLL output frequency */
62#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
63#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
64#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
65#else
66/* edit this value to your needs */
67#define CLOCK_DIV (1U)
68/* generate the actual core clock frequency */
69#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
70#endif
72
77static const tc32_conf_t timer_config[] = {
78 { /* Timer 0 - System Clock */
79 .dev = TC3,
80 .irq = TC3_IRQn,
81 .pm_mask = PM_APBCMASK_TC3,
82 .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
83#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
84 .gclk_src = SAM0_GCLK_1MHZ,
85#else
86 .gclk_src = SAM0_GCLK_MAIN,
87#endif
88 .flags = TC_CTRLA_MODE_COUNT16,
89 },
90 { /* Timer 1 */
91 .dev = TC4,
92 .irq = TC4_IRQn,
93 .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
94 .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
95#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
96 .gclk_src = SAM0_GCLK_1MHZ,
97#else
98 .gclk_src = SAM0_GCLK_MAIN,
99#endif
100 .flags = TC_CTRLA_MODE_COUNT32,
101 }
102};
103
104#define TIMER_0_MAX_VALUE 0xffff
105
106/* interrupt function name mapping */
107#define TIMER_0_ISR isr_tc3
108#define TIMER_1_ISR isr_tc4
109
110#define TIMER_NUMOF ARRAY_SIZE(timer_config)
112
117static const uart_conf_t uart_config[] = {
118 {
119 .dev = &SERCOM0->USART,
120 .rx_pin = GPIO_PIN(PA, 11), /* RX pin */
121 .tx_pin = GPIO_PIN(PA, 10), /* TX pin */
122#ifdef MODULE_PERIPH_UART_HW_FC
123 .rts_pin = GPIO_UNDEF,
124 .cts_pin = GPIO_UNDEF,
125#endif
126 .mux = GPIO_MUX_C,
127 .rx_pad = UART_PAD_RX_3,
128 .tx_pad = UART_PAD_TX_2,
129 .flags = UART_FLAG_NONE,
130 .gclk_src = SAM0_GCLK_MAIN,
131 }
132};
133
134/* interrupt function name mapping */
135#define UART_0_ISR isr_sercom0
136
137#define UART_NUMOF ARRAY_SIZE(uart_config)
139
144#define PWM_0_EN 1
145#define PWM_1_EN 1
146
147#if PWM_0_EN
148/* PWM0 channels */
149static const pwm_conf_chan_t pwm_chan0_config[] = {
150 /* GPIO pin, MUX value, TCC channel */
151 { GPIO_PIN(PA, 7), GPIO_MUX_E, 1 }, /* ~9 */
152};
153#endif
154#if PWM_1_EN
155/* PWM1 channels */
156static const pwm_conf_chan_t pwm_chan1_config[] = {
157 /* GPIO pin, MUX value, TCC channel */
158 { GPIO_PIN(PA, 16), GPIO_MUX_E, 0 }, /* ~11 */
159};
160#endif
161
162/* PWM device configuration */
163static const pwm_conf_t pwm_config[] = {
164#if PWM_0_EN
165 {TCC_CONFIG(TCC0), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
166#endif
167#if PWM_1_EN
168 {TCC_CONFIG(TCC2), pwm_chan1_config, ARRAY_SIZE(pwm_chan1_config), SAM0_GCLK_MAIN},
169#endif
170};
171
172/* number of devices that are actually defined */
173#define PWM_NUMOF ARRAY_SIZE(pwm_config)
175
180
181/* ADC Default values */
182#define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
183
184#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
185#define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_DIV2
186#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
187
188static const adc_conf_chan_t adc_channels[] = {
189 /* port, pin, muxpos */
190 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }, /* A0 */
191 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB08 }, /* A1 */
192 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB09 }, /* A2 */
193 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA04 }, /* A3 */
194 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA05 }, /* A4 */
195 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB02 }, /* A5 */
196 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 }, /* A7 */
197};
198
199#define ADC_NUMOF ARRAY_SIZE(adc_channels)
201
206static const spi_conf_t spi_config[] = {
207 {
208 .dev = &SERCOM4->SPI,
209 .miso_pin = GPIO_PIN(PA, 12),
210 .mosi_pin = GPIO_PIN(PB, 10),
211 .clk_pin = GPIO_PIN(PB, 11),
212 .miso_mux = GPIO_MUX_D,
213 .mosi_mux = GPIO_MUX_D,
214 .clk_mux = GPIO_MUX_D,
215 .miso_pad = SPI_PAD_MISO_0,
216 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
217 .gclk_src = SAM0_GCLK_MAIN,
218#ifdef MODULE_PERIPH_DMA
219 .tx_trigger = SERCOM4_DMAC_ID_TX,
220 .rx_trigger = SERCOM4_DMAC_ID_RX,
221#endif
222 }
223};
224
225#define SPI_NUMOF ARRAY_SIZE(spi_config)
227
232static const i2c_conf_t i2c_config[] = {
233 {
234 .dev = &(SERCOM3->I2CM),
235 .speed = I2C_SPEED_NORMAL,
236 .scl_pin = GPIO_PIN(PA, 23),
237 .sda_pin = GPIO_PIN(PA, 22),
238 .mux = GPIO_MUX_C,
239 .gclk_src = SAM0_GCLK_MAIN,
240 .flags = I2C_FLAG_NONE
241 }
242};
243#define I2C_NUMOF ARRAY_SIZE(i2c_config)
245
250#ifndef RTT_FREQUENCY
251#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
252#endif
254
259static const sam0_common_usb_config_t sam_usbdev_config[] = {
260 {
261 .dm = GPIO_PIN(PA, 24),
262 .dp = GPIO_PIN(PA, 25),
263 .d_mux = GPIO_MUX_G,
264 .device = &USB->DEVICE,
265 .gclk_src = SAM0_GCLK_MAIN,
266 }
267};
269
270#ifdef __cplusplus
271}
272#endif
273
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:274
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition container.h:82
@ UART_PAD_RX_3
select pad 3
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ UART_FLAG_NONE
No flags set.
@ PB
port B
@ PA
port A
@ UART_PAD_TX_2
select pad 2
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA05
Alias for PIN5.
Definition periph_cpu.h:123
#define ADC_INPUTCTRL_MUXPOS_PB08
Alias for PIN2.
Definition periph_cpu.h:120
#define ADC_INPUTCTRL_MUXPOS_PB02
Alias for PIN10.
Definition periph_cpu.h:128
#define ADC_INPUTCTRL_MUXPOS_PB09
Alias for PIN3.
Definition periph_cpu.h:121
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition periph_cpu.h:125
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition periph_cpu.h:75
#define ADC_INPUTCTRL_MUXPOS_PA04
Alias for PIN4.
Definition periph_cpu.h:122
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition periph_cpu.h:118
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition periph_cpu.h:295
PWM channel configuration data structure.
PWM device configuration.
USB peripheral parameters.
SPI device configuration.
Definition periph_cpu.h:333
Timer device configuration.
UART device configuration.
Definition periph_cpu.h:214