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periph_conf.h
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1/*
2 * Copyright (C) 2016 OTA keys
3 *
4 * This file is subject to the terms and conditions of the GNU Lesser
5 * General Public License v2.1. See the file LICENSE in the top level
6 * directory for more details.
7 */
8
9#pragma once
10
20
21#include "periph_cpu.h"
22#include "clk_conf.h"
23#include "cfg_timer_tim2.h"
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
33static const uart_conf_t uart_config[] = {
34 {
35 .dev = USART2,
36 .rcc_mask = RCC_APB1ENR_USART2EN,
37 .rx_pin = GPIO_PIN(PORT_A, 15),
38 .tx_pin = GPIO_PIN(PORT_A, 2),
39 .rx_af = GPIO_AF1,
40 .tx_af = GPIO_AF1,
41 .bus = APB1,
42 .irqn = USART2_IRQn
43 },
44 {
45 .dev = USART1,
46 .rcc_mask = RCC_APB2ENR_USART1EN,
47 .rx_pin = GPIO_PIN(PORT_A, 10),
48 .tx_pin = GPIO_PIN(PORT_A, 9),
49 .rx_af = GPIO_AF1,
50 .tx_af = GPIO_AF1,
51 .bus = APB2,
52 .irqn = USART1_IRQn
53 }
54};
55
56#define UART_0_ISR (isr_usart2)
57#define UART_1_ISR (isr_usart1)
58
59#define UART_NUMOF ARRAY_SIZE(uart_config)
61
66static const pwm_conf_t pwm_config[] = {
67 {
68 .dev = TIM1,
69 .rcc_mask = RCC_APB2ENR_TIM1EN,
70 .chan = { { .pin = GPIO_PIN(PORT_A, 8) /* D9 */, .cc_chan = 0 },
71 { .pin = GPIO_UNDEF, .cc_chan = 0 },
72 { .pin = GPIO_UNDEF, .cc_chan = 0 },
73 { .pin = GPIO_UNDEF, .cc_chan = 0 } },
74 .af = GPIO_AF2,
75 .bus = APB2
76 },
77 {
78 .dev = TIM14,
79 .rcc_mask = RCC_APB1ENR_TIM14EN,
80 .chan = { { .pin = GPIO_PIN(PORT_B, 1) /* D6 */, .cc_chan = 0 },
81 { .pin = GPIO_UNDEF, .cc_chan = 0 },
82 { .pin = GPIO_UNDEF, .cc_chan = 0 },
83 { .pin = GPIO_UNDEF, .cc_chan = 0 } },
84 .af = GPIO_AF0,
85 .bus = APB1
86 },
87 {
88 .dev = TIM3,
89 .rcc_mask = RCC_APB1ENR_TIM3EN,
90 .chan = { { .pin = GPIO_PIN(PORT_B, 0) /* D3 */, .cc_chan = 2 },
91 { .pin = GPIO_UNDEF, .cc_chan = 0 },
92 { .pin = GPIO_UNDEF, .cc_chan = 0 },
93 { .pin = GPIO_UNDEF, .cc_chan = 0 }},
94 .af = GPIO_AF1,
95 .bus = APB1
96 }
97};
98
99#define PWM_NUMOF ARRAY_SIZE(pwm_config)
101
106static const spi_conf_t spi_config[] = {
107 {
108 .dev = SPI1,
109 .mosi_pin = GPIO_PIN(PORT_B, 5),
110 .miso_pin = GPIO_PIN(PORT_B, 4),
111 .sclk_pin = GPIO_PIN(PORT_B, 3),
112 .cs_pin = SPI_CS_UNDEF,
113 .mosi_af = GPIO_AF0,
114 .miso_af = GPIO_AF0,
115 .sclk_af = GPIO_AF0,
116 .cs_af = GPIO_AF0,
117 .rccmask = RCC_APB2ENR_SPI1EN,
118 .apbbus = APB2
119 }
120};
121
122#define SPI_NUMOF ARRAY_SIZE(spi_config)
124
129static const adc_conf_t adc_config[] = {
130 { GPIO_PIN(PORT_A, 0), 0 },
131 { GPIO_PIN(PORT_A, 1), 1 },
132 { GPIO_PIN(PORT_A, 3), 3 },
133 { GPIO_PIN(PORT_A, 4), 4 },
134 { GPIO_PIN(PORT_A, 7), 7 },
135 { GPIO_UNDEF, 18 }, /* VBAT */
136};
137
138#define VBAT_ADC ADC_LINE(5)
139#define ADC_NUMOF ARRAY_SIZE(adc_config)
141
142#ifdef __cplusplus
143}
144#endif
145
@ PORT_B
port B
Definition periph_cpu.h:47
@ PORT_A
port A
Definition periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:45
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
Common configuration for STM32 Timer peripheral based on TIM2.
@ GPIO_AF1
use alternate function 1
Definition cpu_gpio.h:102
@ GPIO_AF2
use alternate function 2
Definition cpu_gpio.h:103
@ GPIO_AF0
use alternate function 0
Definition cpu_gpio.h:101
#define SPI_CS_UNDEF
Define value for unused CS line.
Definition periph_cpu.h:362
@ APB1
Advanced Peripheral Bus 1.
Definition periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2.
Definition periph_cpu.h:79
ADC device configuration.
Definition periph_cpu.h:377
PWM device configuration.
SPI device configuration.
Definition periph_cpu.h:336
UART device configuration.
Definition periph_cpu.h:217