Configuration of CPU peripherals for the Microchip SAM E54 Xplained Pro board.
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Configuration of CPU peripherals for the Microchip SAM E54 Xplained Pro board.
- Author
- Benjamin Valentin benja.nosp@m.min..nosp@m.valen.nosp@m.tin@.nosp@m.ml-pa.nosp@m..com
Definition in file periph_conf.h.
#include "periph_cpu.h"
Go to the source code of this file.
|
| #define | USE_VREG_BUCK (1) |
| | Enable the internal DC/DC converter The board is equipped with the necessary inductor.
|
| |
| #define | USE_XOSC_ONLY (0) |
| | Use the external oscillator to source all fast clocks.
|
| |
|
This is entirely optional, but allows us to save a few bytes if only
a single SDHC instance is used.
|
| #define | SDHC_DEV SDHC1 |
| | The SDHC instance to use.
|
| |
| #define | SDHC_DEV_ISR isr_sdhc1 |
| | Interrupt service routing for SDHC1.
|
| |
| #define | SDHC_CONFIG_NUMOF 1 |
| | Number of configured SDHC devices.
|
| |
| static const sdhc_conf_t | sdhc_config [] |
| | SDHC devices.
|
| |
◆ ADC_GCLK_SRC
◆ ADC_NEG_INPUT
| #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u) |
◆ ADC_NUMOF
◆ ADC_PRESCALER
| #define ADC_PRESCALER ADC_CTRLA_PRESCALER_DIV8 |
◆ ADC_REF_DEFAULT
| #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1 |
◆ AT6561_STBY_PIN
◆ CAN_NUMOF
◆ CLOCK_CORECLOCK
| #define CLOCK_CORECLOCK MHZ(120) |
◆ DAC_CLOCK
◆ DAC_VREF
| #define DAC_VREF DAC_CTRLB_REFSEL_INTREF |
◆ EXTERNAL_OSC32_SOURCE
| #define EXTERNAL_OSC32_SOURCE 1 |
◆ I2C_NUMOF
◆ ISR_CAN1
| #define ISR_CAN1 isr_can1 |
◆ PWM_NUMOF
◆ RTT_FREQUENCY
| #define RTT_FREQUENCY (32768U) |
◆ SDHC_CONFIG_NUMOF
| #define SDHC_CONFIG_NUMOF 1 |
Number of configured SDHC devices.
Definition at line 406 of file periph_conf.h.
◆ SDHC_DEV
◆ SDHC_DEV_ISR
| #define SDHC_DEV_ISR isr_sdhc1 |
Interrupt service routing for SDHC1.
Definition at line 394 of file periph_conf.h.
◆ SPI_NUMOF
◆ TIMER_0_CHANNELS
| #define TIMER_0_CHANNELS 2 |
◆ TIMER_0_ISR
| #define TIMER_0_ISR isr_tc0 |
◆ TIMER_1_CHANNELS
| #define TIMER_1_CHANNELS 2 |
◆ TIMER_1_ISR
| #define TIMER_1_ISR isr_tc2 |
◆ TIMER_NUMOF
◆ UART_0_ISR
| #define UART_0_ISR isr_sercom2_2 |
◆ UART_0_ISR_TX
| #define UART_0_ISR_TX isr_sercom2_0 |
◆ UART_1_ISR
| #define UART_1_ISR isr_sercom0_2 |
◆ UART_1_ISR_TX
| #define UART_1_ISR_TX isr_sercom0_0 |
◆ UART_2_ISR
| #define UART_2_ISR isr_sercom5_2 |
◆ UART_2_ISR_TX
| #define UART_2_ISR_TX isr_sercom5_0 |
◆ UART_3_ISR
| #define UART_3_ISR isr_sercom1_2 |
◆ UART_3_ISR_TX
| #define UART_3_ISR_TX isr_sercom1_0 |
◆ UART_NUMOF
◆ ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE
| #define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0 |
◆ USE_VREG_BUCK
| #define USE_VREG_BUCK (1) |
Enable the internal DC/DC converter The board is equipped with the necessary inductor.
Definition at line 70 of file periph_conf.h.
◆ USE_XOSC_ONLY
| #define USE_XOSC_ONLY (0) |
Use the external oscillator to source all fast clocks.
This allows us to use the buck voltage regulator for maximum power efficiency, but limits the maximum clock frequency to 12 MHz.
Definition at line 35 of file periph_conf.h.
◆ XOSC1_FREQUENCY
| #define XOSC1_FREQUENCY MHZ(12) |
◆ adc_channels
Initial value:= {
}
#define ADC0_INPUTCTRL_MUXPOS_PA07
Alias for AIN7.
#define ADC0_INPUTCTRL_MUXPOS_PA05
Alias for AIN5.
#define ADC0_INPUTCTRL_MUXPOS_PA03
Alias for AIN1.
Definition at line 364 of file periph_conf.h.
◆ candev_conf
Initial value:= {
{
.can = CAN1,
.enable_pin_active_low = true,
}
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
@ GPIO_OUT
select GPIO MASK as output
#define AT6561_STBY_PIN
ATA6561 STANDBY pin definition.
#define SAM0_GCLK_PERIPH
12-48 MHz (DFLL) clock
Available CAN interfaces.
Definition at line 120 of file periph_conf.h.
◆ freqm_config
Initial value:= {
{
}
}
#define SAM0_GCLK_32KHZ
32 kHz clock
Definition at line 436 of file periph_conf.h.
◆ i2c_config
Initial value:= {
{
.dev = &(SERCOM3->I2CM),
},
{
.dev = &(SERCOM7->I2CM),
}
}
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
@ I2C_FLAG_NONE
No flags set.
@ GPIO_MUX_C
select peripheral function C
Definition at line 304 of file periph_conf.h.
◆ pwm_chan0_config
Initial value:= {
{
.chan = 2
},
}
@ GPIO_MUX_F
select peripheral function F
Definition at line 216 of file periph_conf.h.
◆ pwm_config
Initial value:= {
{
.chan = pwm_chan0_config,
.gclk_src = SAM0_GCLK_48MHZ,
},
}
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
Definition at line 226 of file periph_conf.h.
◆ sam_gmac_config
◆ sam_usbdev_config
Initial value:= {
{
.device = &USB->DEVICE,
}
}
@ GPIO_MUX_H
select peripheral function H
Definition at line 341 of file periph_conf.h.
◆ sdhc_config
Initial value:= {
{
.sdhc = SDHC1,
},
}
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
SDHC devices.
Definition at line 397 of file periph_conf.h.
◆ spi_config
◆ timer_config
Initial value:= {
{
.dev = TC0,
.irq = TC0_IRQn,
.mclk = &MCLK->APBAMASK.reg,
.mclk_mask = MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1,
.gclk_id = TC0_GCLK_ID,
.flags = TC_CTRLA_MODE_COUNT32,
},
{
.dev = TC2,
.irq = TC2_IRQn,
.mclk = &MCLK->APBBMASK.reg,
.mclk_mask = MCLK_APBBMASK_TC2 | MCLK_APBBMASK_TC3,
.gclk_id = TC2_GCLK_ID,
.flags = TC_CTRLA_MODE_COUNT32,
}
}
#define SAM0_GCLK_TIMER
4-8 MHz clock for xTimer
Definition at line 76 of file periph_conf.h.
◆ uart_config
Include dependency graph for periph_conf.h: