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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2014-2015 Freie Universität Berlin
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
20
21#include <stdint.h>
22
23#include "cpu.h"
24#include "periph_cpu.h"
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
62#define CLOCK_USE_PLL (1)
63#define CLOCK_USE_XOSC32_DFLL (0)
64/*
65 * 0: use XOSC32K (always 32.768kHz) to clock GCLK2
66 * 1: use OSCULP32K factory calibrated (~32.768kHz) to clock GCLK2
67 *
68 * OSCULP32K is factory calibrated to be around 32.768kHz but this values can
69 * be of by a couple off % points, so prefer XOSC32K as default configuration.
70 */
71#define GEN2_ULP32K (0)
72
73#if CLOCK_USE_PLL
74/* edit these values to adjust the PLL output frequency */
75#define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
76#define CLOCK_PLL_DIV (1U) /* adjust to your needs */
77/* generate the actual used core clock frequency */
78#define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
79#elif CLOCK_USE_XOSC32_DFLL
80 /* Settings for 32 kHz external oscillator and 48 MHz DFLL */
81#define CLOCK_CORECLOCK (48000000U)
82#define CLOCK_XOSC32K (32768UL)
83#define CLOCK_8MHZ (1)
84#else
85/* edit this value to your needs */
86#define CLOCK_DIV (1U)
87/* generate the actual core clock frequency */
88#define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
89#endif
91
96static const tc32_conf_t timer_config[] = {
97 { /* Timer 0 - System Clock */
98 .dev = TC3,
99 .irq = TC3_IRQn,
100 .pm_mask = PM_APBCMASK_TC3,
101 .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
102#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
103 .gclk_src = SAM0_GCLK_1MHZ,
104#else
105 .gclk_src = SAM0_GCLK_MAIN,
106#endif
107 .flags = TC_CTRLA_MODE_COUNT16,
108 },
109 { /* Timer 1 */
110 .dev = TC4,
111 .irq = TC4_IRQn,
112 .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
113 .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
114#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
115 .gclk_src = SAM0_GCLK_1MHZ,
116#else
117 .gclk_src = SAM0_GCLK_MAIN,
118#endif
119 .flags = TC_CTRLA_MODE_COUNT32,
120 }
121};
122
123#define TIMER_0_MAX_VALUE 0xffff
124
125/* interrupt function name mapping */
126#define TIMER_0_ISR isr_tc3
127#define TIMER_1_ISR isr_tc4
128
129#define TIMER_NUMOF ARRAY_SIZE(timer_config)
131
136static const uart_conf_t uart_config[] = {
137 {
138 .dev = &SERCOM0->USART,
139 .rx_pin = GPIO_PIN(PA,5),
140 .tx_pin = GPIO_PIN(PA,4),
141#ifdef MODULE_PERIPH_UART_HW_FC
142 .rts_pin = GPIO_PIN(PA,6),
143 .cts_pin = GPIO_PIN(PA,7),
144#endif
145 .mux = GPIO_MUX_D,
146 .rx_pad = UART_PAD_RX_1,
147#ifdef MODULE_PERIPH_UART_HW_FC
149#else
150 .tx_pad = UART_PAD_TX_0,
151#endif
152 .flags = UART_FLAG_NONE,
153 .gclk_src = SAM0_GCLK_MAIN,
154 },
155 {
156 .dev = &SERCOM5->USART,
157 .rx_pin = GPIO_PIN(PA,23),
158 .tx_pin = GPIO_PIN(PA,22),
159#ifdef MODULE_PERIPH_UART_HW_FC
160 .rts_pin = GPIO_PIN(PB,22),
161 .cts_pin = GPIO_PIN(PB,23),
162#endif
163 .mux = GPIO_MUX_D,
164 .rx_pad = UART_PAD_RX_1,
165#ifdef MODULE_PERIPH_UART_HW_FC
167#else
168 .tx_pad = UART_PAD_TX_0,
169#endif
170 .flags = UART_FLAG_NONE,
171 .gclk_src = SAM0_GCLK_MAIN,
172 }
173};
174
175/* interrupt function name mapping */
176#define UART_0_ISR isr_sercom0
177#define UART_1_ISR isr_sercom5
178
179#define UART_NUMOF ARRAY_SIZE(uart_config)
181
186#define PWM_0_EN 1
187#define PWM_1_EN 1
188
189#if PWM_0_EN
190/* PWM0 channels */
191static const pwm_conf_chan_t pwm_chan0_config[] = {
192 /* GPIO pin, MUX value, TCC channel */
193 { .pin = GPIO_PIN(PA, 6), .mux = GPIO_MUX_E, .chan = 0 },
194 { .pin = GPIO_PIN(PA, 7), .mux = GPIO_MUX_E, .chan = 1 },
195};
196#endif
197#if PWM_1_EN
198/* PWM1 channels */
199static const pwm_conf_chan_t pwm_chan1_config[] = {
200 /* GPIO pin, MUX value, TCC channel */
201 { .pin = GPIO_PIN(PA, 16), .mux = GPIO_MUX_F, .chan = 0 },
202 { .pin = GPIO_PIN(PA, 18), .mux = GPIO_MUX_F, .chan = 2 },
203 { .pin = GPIO_PIN(PA, 19), .mux = GPIO_MUX_F, .chan = 3 },
204};
205#endif
206
207/* PWM device configuration */
208static const pwm_conf_t pwm_config[] = {
209#if PWM_0_EN
210 {
211 .tim = TCC_CONFIG(TCC1),
212 .chan = pwm_chan0_config,
213 .chan_numof = ARRAY_SIZE(pwm_chan0_config),
214 .gclk_src = SAM0_GCLK_MAIN,
215 },
216#endif
217#if PWM_1_EN
218 {
219 .tim = TCC_CONFIG(TCC0),
220 .chan = pwm_chan1_config,
221 .chan_numof = ARRAY_SIZE(pwm_chan1_config),
222 .gclk_src = SAM0_GCLK_MAIN,
223 },
224#endif
225};
226
227/* number of devices that are actually defined */
228#define PWM_NUMOF ARRAY_SIZE(pwm_config)
230
235static const spi_conf_t spi_config[] = {
236 {
237 .dev = &SERCOM4->SPI,
238 .miso_pin = GPIO_PIN(PC, 19),
239 .mosi_pin = GPIO_PIN(PB, 30),
240 .clk_pin = GPIO_PIN(PC, 18),
241 .miso_mux = GPIO_MUX_F,
242 .mosi_mux = GPIO_MUX_F,
243 .clk_mux = GPIO_MUX_F,
244 .miso_pad = SPI_PAD_MISO_0,
245 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
246 .gclk_src = SAM0_GCLK_MAIN,
247#ifdef MODULE_PERIPH_DMA
248 .tx_trigger = SERCOM4_DMAC_ID_TX,
249 .rx_trigger = SERCOM4_DMAC_ID_RX,
250#endif
251 },
252 {
253 .dev = &SERCOM5->SPI,
254 .miso_pin = GPIO_PIN(PB, 2),
255 .mosi_pin = GPIO_PIN(PB, 22),
256 .clk_pin = GPIO_PIN(PB, 23),
257 .miso_mux = GPIO_MUX_D,
258 .mosi_mux = GPIO_MUX_D,
259 .clk_mux = GPIO_MUX_D,
260 .miso_pad = SPI_PAD_MISO_0,
261 .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
262 .gclk_src = SAM0_GCLK_MAIN,
263#ifdef MODULE_PERIPH_DMA
264 .tx_trigger = SERCOM5_DMAC_ID_TX,
265 .rx_trigger = SERCOM5_DMAC_ID_RX,
266#endif
267 }
268};
269
270#define SPI_NUMOF ARRAY_SIZE(spi_config)
272
277static const i2c_conf_t i2c_config[] = {
278 {
279 .dev = &(SERCOM3->I2CM),
280 .speed = I2C_SPEED_NORMAL,
281 .scl_pin = GPIO_PIN(PA, 17),
282 .sda_pin = GPIO_PIN(PA, 16),
283 .mux = GPIO_MUX_D,
284 .gclk_src = SAM0_GCLK_MAIN,
285 .flags = I2C_FLAG_NONE
286 }
287};
288#define I2C_NUMOF ARRAY_SIZE(i2c_config)
290
295#ifndef RTT_FREQUENCY
296#define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
297#endif
298#define RTT_MIN_OFFSET (10U)
300
305
306/* ADC Default values */
307#define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
308
309#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
310#define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
311#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
312
313static const adc_conf_chan_t adc_channels[] = {
314 /* port, pin, muxpos */
315 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 }, /* EXT1, pin 3 */
316 { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 }, /* EXT1, pin 4 */
317};
318
319#define ADC_NUMOF ARRAY_SIZE(adc_channels)
321
326static const sam0_common_usb_config_t sam_usbdev_config[] = {
327 {
328 .dm = GPIO_PIN(PA, 24),
329 .dp = GPIO_PIN(PA, 25),
330 .d_mux = GPIO_MUX_G,
331 .device = &USB->DEVICE,
332 .gclk_src = SAM0_GCLK_MAIN,
333 }
334};
336#ifdef __cplusplus
337}
338#endif
339
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:274
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition container.h:82
@ UART_PAD_RX_1
select pad 1
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ UART_FLAG_NONE
No flags set.
@ PB
port B
@ PC
port C
@ PA
port A
@ UART_PAD_TX_0_RTS_2_CTS_3
TX is pad 0, on top RTS on pad 2 and CTS on pad 3.
@ UART_PAD_TX_0
select pad 0
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_F
select peripheral function F
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition periph_cpu.h:125
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition periph_cpu.h:75
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition periph_cpu.h:124
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition periph_cpu.h:73
ADC Channel Configuration.
I2C configuration structure.
Definition periph_cpu.h:295
PWM channel configuration data structure.
PWM device configuration.
USB peripheral parameters.
SPI device configuration.
Definition periph_cpu.h:333
Timer device configuration.
UART device configuration.
Definition periph_cpu.h:214