20#include "periph_cpu.h"
33#define CLOCK_HF cmuSelect_HFXO
36#define CLOCK_CORE_DIV cmuClkDiv_1
39#define CLOCK_LFA cmuSelect_LFXO
42#define CLOCK_LFB cmuSelect_LFXO
45#define CLOCK_LFE cmuSelect_LFXO
63 .input = adcPosSelTEMP,
64 .reference = adcRef1V25,
65 .acq_time = adcAcqTime8
69 .input = adcPosSelAVDD,
70 .reference = adcRef5V,
71 .acq_time = adcAcqTime8
75#define ADC_DEV_NUMOF ARRAY_SIZE(adc_config)
76#define ADC_NUMOF ARRAY_SIZE(adc_channel_config)
87 .cmu = cmuClock_VDAC0,
91static const dac_chan_conf_t dac_channel_config[] = {
98#define DAC_DEV_NUMOF ARRAY_SIZE(dac_config)
99#define DAC_NUMOF ARRAY_SIZE(dac_channel_config)
111 .loc = I2C_ROUTELOC0_SDALOC_LOC7 |
112 I2C_ROUTELOC0_SCLLOC_LOC7,
113 .cmu = cmuClock_I2C0,
119#define I2C_NUMOF ARRAY_SIZE(i2c_config)
120#define I2C_0_ISR isr_i2c0
128#define RTT_FREQUENCY (1U)
142 .loc = USART_ROUTELOC0_RXLOC_LOC0 |
143 USART_ROUTELOC0_TXLOC_LOC0 |
144 USART_ROUTELOC0_CLKLOC_LOC0,
145 .cmu = cmuClock_USART3,
146 .irq = USART3_RX_IRQn
150#define SPI_NUMOF ARRAY_SIZE(spi_config)
163 .cmu = cmuClock_TIMER0
167 .cmu = cmuClock_TIMER1
175 .cmu = cmuClock_LETIMER0
179 .cmu = cmuClock_LETIMER0
181 .irq = LETIMER0_IRQn,
186#define TIMER_NUMOF ARRAY_SIZE(timer_config)
187#define TIMER_0_ISR isr_timer1
188#define TIMER_1_ISR isr_letimer0
200 .loc = USART_ROUTELOC0_RXLOC_LOC1 |
201 USART_ROUTELOC0_TXLOC_LOC1,
202 .cmu = cmuClock_USART0,
203 .irq = USART0_RX_IRQn
209 .loc = UART_ROUTELOC0_RXLOC_LOC4 |
210 UART_ROUTELOC0_TXLOC_LOC4,
211 .cmu = cmuClock_UART0,
216#define UART_NUMOF ARRAY_SIZE(uart_config)
217#define UART_0_ISR_RX isr_usart0_rx
218#define UART_1_ISR_RX isr_uart0_rx
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
#define UART0
UART0 register bank.
ADC channel configuration.
ADC device configuration.
DAC line configuration data.
I2C configuration structure.
SPI device configuration.
Timer device configuration.
UART device configuration.
Common configuration for EFM32 OTG FS peripheral.