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periph_conf.h
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1/*
2 * SPDX-FileCopyrightText: 2020 Scallog
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
17
18/* This board provides an LSE */
19#ifndef CONFIG_BOARD_HAS_LSE
20#define CONFIG_BOARD_HAS_LSE 1
21#endif
22
23/* This board provides an HSE */
24#ifndef CONFIG_BOARD_HAS_HSE
25#define CONFIG_BOARD_HAS_HSE 1
26#endif
27
28#include "periph_cpu.h"
29#include "clk_conf.h"
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
39static const adc_conf_t adc_config[] = {
40 { GPIO_PIN(PORT_C, 0), 0, 10 },
41 { GPIO_PIN(PORT_C, 1), 0, 11 },
42 { GPIO_PIN(PORT_C, 2), 0, 12 },
43 { GPIO_PIN(PORT_C, 3), 0, 13 },
44 { GPIO_PIN(PORT_C, 4), 0, 14 },
45 { GPIO_PIN(PORT_C, 5), 0, 15 }
46};
47
48#define ADC_NUMOF ARRAY_SIZE(adc_config)
50
55static const pwm_conf_t pwm_config[] = {
56 {
57 .dev = TIM1,
58 .rcc_mask = RCC_APB2ENR_TIM1EN,
59 .chan = { { .pin = GPIO_PIN(PORT_A, 8), .cc_chan = 0 },
60 { .pin = GPIO_PIN(PORT_A, 9), .cc_chan = 1 },
61 { .pin = GPIO_PIN(PORT_A, 10), .cc_chan = 2 },
62 { .pin = GPIO_PIN(PORT_A, 11), .cc_chan = 3 } },
63 .af = GPIO_AF_OUT_PP,
64 .bus = APB2
65 },
66 {
67 .dev = TIM2,
68 .rcc_mask = RCC_APB1ENR_TIM2EN,
69 .chan = { { .pin = GPIO_PIN(PORT_A, 0), .cc_chan = 0 },
70 { .pin = GPIO_PIN(PORT_A, 1), .cc_chan = 1 },
71 { .pin = GPIO_PIN(PORT_A, 2), .cc_chan = 2 },
72 { .pin = GPIO_PIN(PORT_A, 3), .cc_chan = 3 } },
73 .af = GPIO_AF_OUT_PP,
74 .bus = APB1
75 },
76 {
77 .dev = TIM3,
78 .rcc_mask = RCC_APB1ENR_TIM3EN,
79 .chan = { { .pin = GPIO_PIN(PORT_A, 6), .cc_chan = 0 },
80 { .pin = GPIO_PIN(PORT_A, 7), .cc_chan = 1 },
81 { .pin = GPIO_PIN(PORT_B, 0), .cc_chan = 2 },
82 { .pin = GPIO_PIN(PORT_B, 1), .cc_chan = 3 } },
83 .af = GPIO_AF_OUT_PP,
84 .bus = APB1
85 },
86 {
87 .dev = TIM4,
88 .rcc_mask = RCC_APB1ENR_TIM4EN,
89 .chan = { { .pin = GPIO_PIN(PORT_B, 6), .cc_chan = 0 },
90 { .pin = GPIO_PIN(PORT_B, 7), .cc_chan = 1 },
91 { .pin = GPIO_PIN(PORT_B, 8), .cc_chan = 2 },
92 { .pin = GPIO_PIN(PORT_B, 9), .cc_chan = 3 } },
93 .af = GPIO_AF_OUT_PP,
94 .bus = APB1
95 }
96};
97
98#define PWM_NUMOF ARRAY_SIZE(pwm_config)
100
105static const timer_conf_t timer_config[] = {
106 {
107 .dev = TIM2,
108 .max = 0x0000ffff,
109 .rcc_mask = RCC_APB1ENR_TIM2EN,
110 .bus = APB1,
111 .irqn = TIM2_IRQn
112 },
113 {
114 .dev = TIM3,
115 .max = 0x0000ffff,
116 .rcc_mask = RCC_APB1ENR_TIM3EN,
117 .bus = APB1,
118 .irqn = TIM3_IRQn
119 },
120 {
121 .dev = TIM4,
122 .max = 0x0000ffff,
123 .rcc_mask = RCC_APB1ENR_TIM4EN,
124 .bus = APB1,
125 .irqn = TIM4_IRQn
126 }
127};
128
129#define TIMER_0_ISR isr_tim2
130#define TIMER_1_ISR isr_tim3
131#define TIMER_2_ISR isr_tim4
132
133#define TIMER_NUMOF ARRAY_SIZE(timer_config)
135
140static const uart_conf_t uart_config[] = {
141 {
142 .dev = USART2,
143 .rcc_mask = RCC_APB1ENR_USART2EN,
144 .rx_pin = GPIO_PIN(PORT_A, 3),
145 .tx_pin = GPIO_PIN(PORT_A, 2),
146 .bus = APB1,
147 .irqn = USART2_IRQn
148 },
149 {
150 .dev = USART1,
151 .rcc_mask = RCC_APB2ENR_USART1EN,
152 .rx_pin = GPIO_PIN(PORT_A, 10),
153 .tx_pin = GPIO_PIN(PORT_A, 9),
154 .bus = APB2,
155 .irqn = USART1_IRQn
156 },
157 {
158 .dev = USART3,
159 .rcc_mask = RCC_APB1ENR_USART3EN,
160 .rx_pin = GPIO_PIN(PORT_B, 11),
161 .tx_pin = GPIO_PIN(PORT_B, 10),
162 .bus = APB1,
163 .irqn = USART3_IRQn
164 }
165};
166
167#define UART_0_ISR (isr_usart2)
168#define UART_1_ISR (isr_usart1)
169#define UART_2_ISR (isr_usart3)
170
171#define UART_NUMOF ARRAY_SIZE(uart_config)
173
178#ifndef RTT_FREQUENCY
179#define RTT_FREQUENCY (16384) /* in Hz */
180#endif
182
188
189static const i2c_conf_t i2c_config[] = {
190 {
191 .dev = I2C1,
192 .speed = I2C_SPEED_NORMAL,
193 .scl_pin = GPIO_PIN(PORT_B, 8),
194 .sda_pin = GPIO_PIN(PORT_B, 9),
195 .bus = APB1,
196 .rcc_mask = RCC_APB1ENR_I2C1EN,
197 .clk = CLOCK_APB1,
198 .irqn = I2C1_EV_IRQn
199 },
200 {
201 .dev = I2C2,
202 .speed = I2C_SPEED_NORMAL,
203 .scl_pin = GPIO_PIN(PORT_B, 10),
204 .sda_pin = GPIO_PIN(PORT_B, 11),
205 .bus = APB1,
206 .rcc_mask = RCC_APB1ENR_I2C2EN,
207 .clk = CLOCK_APB1,
208 .irqn = I2C2_EV_IRQn
209 }
210};
211
212#define I2C_0_ISR isr_i2c1_ev
213#define I2C_1_ISR isr_i2c2_ev
214
215#define I2C_NUMOF ARRAY_SIZE(i2c_config)
217
222static const spi_conf_t spi_config[] = {
223 {
224 .dev = SPI1,
225 .mosi_pin = GPIO_PIN(PORT_A, 7),
226 .miso_pin = GPIO_PIN(PORT_A, 6),
227 .sclk_pin = GPIO_PIN(PORT_A, 5),
228 .cs_pin = GPIO_UNDEF,
229 .rccmask = RCC_APB2ENR_SPI1EN,
230 .apbbus = APB2
231 },
232 {
233 .dev = SPI2,
234 .mosi_pin = GPIO_PIN(PORT_B, 15),
235 .miso_pin = GPIO_PIN(PORT_B, 14),
236 .sclk_pin = GPIO_PIN(PORT_B, 13),
237 .cs_pin = GPIO_UNDEF,
238 .rccmask = RCC_APB1ENR_SPI2EN,
239 .apbbus = APB1
240 }
241};
242
243#define SPI_NUMOF ARRAY_SIZE(spi_config)
245
246#ifdef __cplusplus
247}
248#endif
249
@ PORT_B
port B
Definition periph_cpu.h:44
@ PORT_C
port C
Definition periph_cpu.h:45
@ PORT_A
port A
Definition periph_cpu.h:43
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:274
@ GPIO_AF_OUT_PP
alternate function output - push-pull
Definition periph_cpu.h:166
@ APB1
Advanced Peripheral Bus 1.
Definition periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2.
Definition periph_cpu.h:79
ADC device configuration.
Definition periph_cpu.h:374
I2C configuration structure.
Definition periph_cpu.h:295
PWM device configuration.
SPI device configuration.
Definition periph_cpu.h:333
Timer device configuration.
Definition periph_cpu.h:260
UART device configuration.
Definition periph_cpu.h:214