Loading...
Searching...
No Matches
periph_conf.h
Go to the documentation of this file.
1/*
2 * SPDX-FileCopyrightText: 2015-2020 Freie Universität Berlin
3 * SPDX-License-Identifier: LGPL-2.1-only
4 */
5
6#pragma once
7
18
19#include "cpu.h"
20#include "periph_cpu.h"
21#include "em_cmu.h"
22
23#ifdef __cplusplus
24extern "C" {
25#endif
26
31#ifndef CLOCK_HF
32#define CLOCK_HF cmuSelect_HFXO
33#endif
34#ifndef CLOCK_CORE_DIV
35#define CLOCK_CORE_DIV cmuClkDiv_1
36#endif
37#ifndef CLOCK_LFA
38#define CLOCK_LFA cmuSelect_LFXO
39#endif
40#ifndef CLOCK_LFB
41#define CLOCK_LFB cmuSelect_LFXO
42#endif
44
49static const adc_conf_t adc_config[] = {
50 {
51 .dev = ADC0,
52 .cmu = cmuClock_ADC0,
53 }
54};
55
56static const adc_chan_conf_t adc_channel_config[] = {
57 {
58 .dev = 0,
59 .input = adcSingleInputTemp,
60 .reference = adcRef1V25,
61 .acq_time = adcAcqTime8
62 },
63 {
64 .dev = 0,
65 .input = adcSingleInputVDDDiv3,
66 .reference = adcRef1V25,
67 .acq_time = adcAcqTime8
68 }
69};
70
71#define ADC_DEV_NUMOF ARRAY_SIZE(adc_config)
72#define ADC_NUMOF ARRAY_SIZE(adc_channel_config)
74
79static const dac_conf_t dac_config[] = {
80 {
81 .dev = DAC0,
82 .ref = dacRefVDD,
83 .cmu = cmuClock_DAC0,
84 }
85};
86
87static const dac_chan_conf_t dac_channel_config[] = {
88 {
89 .dev = 0,
90 .index = 1,
91 }
92};
93
94#define DAC_DEV_NUMOF ARRAY_SIZE(dac_config)
95#define DAC_NUMOF ARRAY_SIZE(dac_channel_config)
97
102static const i2c_conf_t i2c_config[] = {
103 {
104 .dev = I2C1,
105 .sda_pin = GPIO_PIN(PE, 0),
106 .scl_pin = GPIO_PIN(PE, 1),
107 .loc = I2C_ROUTE_LOCATION_LOC2,
108 .cmu = cmuClock_I2C1,
109 .irq = I2C1_IRQn,
110 .speed = I2C_SPEED_NORMAL
111 }
112};
113
114#define I2C_NUMOF ARRAY_SIZE(i2c_config)
115#define I2C_0_ISR isr_i2c1
117
122static const pwm_chan_conf_t pwm_channel_config[] = {
123 {
124 .index = 0,
125 .pin = GPIO_PIN(PF, 6),
126 .loc = TIMER_ROUTE_LOCATION_LOC2
127 },
128 {
129 .index = 1,
130 .pin = GPIO_PIN(PF, 7),
131 .loc = TIMER_ROUTE_LOCATION_LOC2
132 }
133};
134
135static const pwm_conf_t pwm_config[] = {
136 {
137 .dev = TIMER0,
138 .cmu = cmuClock_TIMER0,
139 .irq = TIMER0_IRQn,
140 .channels = 2,
141 .channel = pwm_channel_config
142 }
143};
144
145#define PWM_DEV_NUMOF ARRAY_SIZE(pwm_config)
146#define PWM_NUMOF ARRAY_SIZE(pwm_channel_config)
148
153#ifndef RTT_FREQUENCY
154#define RTT_FREQUENCY (1U) /* in Hz */
155#endif
157
162static const spi_dev_t spi_config[] = {
163 {
164 .dev = USART1,
165 .mosi_pin = GPIO_PIN(PD, 0),
166 .miso_pin = GPIO_PIN(PD, 1),
167 .clk_pin = GPIO_PIN(PD, 2),
168 .loc = USART_ROUTE_LOCATION_LOC1,
169 .cmu = cmuClock_USART1,
170 .irq = USART1_RX_IRQn
171 }
172};
173
174#define SPI_NUMOF ARRAY_SIZE(spi_config)
176
183static const timer_conf_t timer_config[] = {
184 {
185 .prescaler = {
186 .dev = TIMER1,
187 .cmu = cmuClock_TIMER1
188 },
189 .timer = {
190 .dev = TIMER2,
191 .cmu = cmuClock_TIMER2
192 },
193 .irq = TIMER2_IRQn,
194 .channel_numof = 3
195 },
196 {
197 .prescaler = {
198 .dev = NULL,
199 .cmu = cmuClock_LETIMER0
200 },
201 .timer = {
202 .dev = LETIMER0,
203 .cmu = cmuClock_LETIMER0
204 },
205 .irq = LETIMER0_IRQn,
206 .channel_numof = 2
207 }
208};
209
210#define TIMER_NUMOF ARRAY_SIZE(timer_config)
211#define TIMER_0_ISR isr_timer2
212#define TIMER_1_ISR isr_letimer0
214
219static const uart_conf_t uart_config[] = {
220 {
221 .dev = USART2,
222 .rx_pin = GPIO_PIN(PB, 4),
223 .tx_pin = GPIO_PIN(PB, 3),
224 .loc = USART_ROUTE_LOCATION_LOC1,
225 .cmu = cmuClock_USART2,
226 .irq = USART2_RX_IRQn
227 },
228 {
229 .dev = LEUART0,
230 .rx_pin = GPIO_PIN(PD, 5),
231 .tx_pin = GPIO_PIN(PD, 4),
232 .loc = LEUART_ROUTE_LOCATION_LOC0,
233 .cmu = cmuClock_LEUART0,
234 .irq = LEUART0_IRQn
235 }
236};
237
238#define UART_NUMOF ARRAY_SIZE(uart_config)
239#define UART_0_ISR_RX isr_usart2_rx
240#define UART_1_ISR_RX isr_leuart0
242
243#ifdef __cplusplus
244}
245#endif
246
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition periph_cpu.h:42
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition periph_cpu.h:274
@ PB
port B
@ PD
port D
ADC channel configuration.
Definition periph_cpu.h:382
ADC device configuration.
Definition periph_cpu.h:374
DAC line configuration data.
Definition periph_cpu.h:300
I2C configuration structure.
Definition periph_cpu.h:295
PWM channel configuration.
Definition periph_cpu.h:464
PWM device configuration.
SPI device configuration.
Definition periph_cpu.h:513
Timer device configuration.
Definition periph_cpu.h:260
UART device configuration.
Definition periph_cpu.h:214